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BazingaWei
Novice
149 Views

carry chain delay differs a lot between two LEs in same LAB

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I implemented TDC based on carry chain in Cyclone IV. By measuring the bin size based on code density method, after lots of random test, the delay destribution varies a lot for each delay element in the carry chain. Especially, the delays for two dalay elements(logic element)next to each other in same LAB differ a lot (see the figure). 

My question is: why most carry signal 'falls' in the odd-indexed position?

ths a lot!

 pic.png

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ShyanYewT_Intel
Employee
102 Views

Perhaps the below article may help clarify your questions. 

https://arxiv.org/ftp/arxiv/papers/1805/1805.12390.pdf

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2 Replies
ShyanYewT_Intel
Employee
103 Views

Perhaps the below article may help clarify your questions. 

https://arxiv.org/ftp/arxiv/papers/1805/1805.12390.pdf

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BazingaWei
Novice
85 Views

That is exactly what i want, thanks a lot