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causing damage on VCCA_PLL pins of EP3SE50

Altera_Forum
Honored Contributor II
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Hi, 

 

We have a EP3SE50-based design and we have found 3 failing boards out of 25 tested so far, where one of VCCA_PLL pins gets internally shorted after power up. In the design, all VCCA_PLL pins are powered up. What can possibly cause such damage? 

 

We have monitored ramp up of different FPGA voltages and they seem to be fine.  

Any advice? 

 

Mandana
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Altera_Forum
Honored Contributor II
377 Views

shorts and opens are said to normally be electrical over stress: 

 

http://www.altera.com/support/devices/dvs-failure_analysis.html
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