changing FPGA cyclone4-115 with another one on the same PCB card

[Altera_Forum]

I hope that somebody can make me a favor! 

I'm working on ALTERA FPGA Cyclone IV family.  I'm about finishing the PCB design, but my idea is to have a card with multiple FPGA possibility. to be more clear, if my altera design is not too large I would change the FPGA on my card by having migration from Cyclone4 115 to 75, 55, 40, 30 or 15.  So I made the comparision between all thoses components and I found out that the migration forced me to rout some IO pins to VCCint; that why I have a new problem concerning the voltage applied in each input (because of the difference between the IO voltage and VCCint).  So if you have any idea concerning the migration methode please tell me about!!! Yours!

[Altera_Forum]

go to Assignments > Device and turn on Migration Devices

[Altera_Forum]

hi 

10x for your reply I made it before, but the problem is concerning the PCB. even if the migration is well done, I can't change the FPGA with another one because of the routing.  imagine that you replace the Cyclone4-115 with a lower one (75 or 55) on the same card, the problem we have is that some IO pins of the cyclone4-75 are a VCCint for the cyclone4-115; and the VCCint voltage is in the middle rang of the IO voltage what mean we have a metastability :(

[Altera_Forum]

--- Quote Start ---  the VCCint voltage is in the middle rang of the IO voltage what mean we have a metastability  --- Quote End ---   Metastability is something different. At worst case, you have an increased current consumption of the involved input buffers. You can ask Altera support about a specification. It may be even the case, that the respective input buffers are diasbled, if the migration devices are selected.

[Altera_Forum]

hi 

sorry I made a mistake when I was talking about my problem  brief, the IO low voltage should be less then 0.8V and the high voltage should be more then 2.4V  but the VCCint value is 1.2V it's forbidden to have a value between 0.8 and 2.4  maybe now I detailed my problem :D

[Altera_Forum]

I understood your question well and answered it in my post.

[Altera_Forum]

--- Quote Start ---   It may be even the case, that the respective input buffers are diasbled, if the migration devices are selected.  --- Quote End ---      I like it!!! I think that works like you say! thanks :D anyway I'm going to ask the ALTERA support

[Altera_Forum]

To determine what actually happens, you would need to supply a variable input voltage to one of the "migration" related pins and check, if you are able cause a rise of supply current when traversing the undefined logic level range. My assumption is however, that even if the input buffer isn't disabled, the excessive current consumption will be moderate, not above a few mA, and can be tolerated.

[Altera_Forum]

Hi, 

 Hi,  I am also facing the same problem: I have been working for 3 months on a Cyclone IV GX Development Board in order to get use with it. Now I have to design both PCB(Altium)+ FPGA Board for my project: So my concerns are:  1) Can anyone give me all the steps I needed to develop the whole project(PCB+ FPGA)? 2) I start the design with EP4CGX15BF14C7(72 I/O) and I realized yesterday I would need more pins:How about the migration oder what could be the safer way for me to avoid surprise?  I would really appreciate any advice  Regard   Regards,