clock input to PLL in cyclone III

[Altera_Forum]

what is the signal type of the input clock to PLL? is it listed in table 1–13. cyclone iii devices single-ended i/o standard specifications of cyclone iii device handbook? such as LVTTL/ LVCMOS etc. How about sinewave? and what is the signal swing?  

thanks very much!

[Altera_Forum]

I'm not sure about older chips like the Cyclone III, but newer chips have the I/O standard configurable. You set it to what you intend to use in your Quartus project. Check the section on clocks in the handbook for more information. I'd guess that sine wave won't work. You probably need an actual square wave with the rise time as specified in the documentation. The docs probably have several example clocking schemes.