Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

clock_sink

Altera_Forum
Honored Contributor II
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Hi, 

Can anyone tell me the defirrence between the clk in reset_clock and the clk in clock_sink in Components editor?Is the clk in clock_sink outside the Avalone Interface? 

LiuJN
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Altera_Forum
Honored Contributor II
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I guess you have this because you created two clock interfaces.

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