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Hi team ,
for one of our maintenance's projects, we have moved from Xilinx spartan 6 FPGA to INTEL FPGA part cyclone 10LP device.
The task i have now is needed to change the Verilog HDL code with respect to new device, there lot of IP's and GPIO's are used in the HDL .
Please let me know the following queries with respect to Newbie with INTEL devices and tool.
query 1: what are the steps to followed for code conversion
query 2: What are the smart and efficient ways to migrate the design?
query 3 : where can i get the intel pin package data user guide for cyclone 10lp device .
query 4: what are consideration of GPIO need to taken care from intel point of view .
query5 : do we have any Automated code conversion of XILINX FPGA to intel Quartus.
i am going through this now :
https://www.intel.com/content/www/us/en/docs/programmable/683562/21-3/to-fpga-design-conversion.html
let me know your inputs
thansk
cs
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There aren't much difference in code style, just follow the device feature is fine.
And you can find the device package information from the following link:
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hi @TingJiangT_Intel ,
Thanks for reply, i do not see in the link about the number of banks and pins definition
i am looking for more of kind of information like Spartan-6 FPGA SelectIO Resources User Guide and Spartan-6 FPGA Packaging and Pinouts Product Specification (UG385) for intel FPGA 10CL device
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Hi,
Currently, officially, we only have the link that you mention for the X2I migration.
For the above question, we will get back to you ASAP.
Thanks
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Hi,
Per my understanding, you need a pinout file for Cyclone 10 LP? You may refer below:
Regards,
Aiman
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We do not receive any response from you to the previous answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you

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