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i found this side pretty helpful for my project...and i just registered now...my question is can i store sine wave look up table in cpld? it would b very helpful if any one having any idea how to generate sine wave using cpld? help..:confused:
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It is very very difficult question ;)
the first you should aware that what argument range to use, usually it is from 0 to 90 degrees. than you can create lookup table for that range and provide utilty function to get final value. So you need 91 values , somehow represented with scale factor 1000000. sine values below.000000 , 017452 , 034899 , 052336 , 069756 ,
087156 , 104528 , 121869 , 139173 , 156434 ,
173648 , 190809 , 207912 , 224951 , 241922 ,
258819 , 275637 , 292372 , 309017 , 325568 ,
342020 , 358368 , 374607 , 390731 , 406737 ,
422618 , 438371 , 453990 , 469472 , 484810 ,
500000 , 515038 , 529919 , 544639 , 559193 ,
573576 , 587785 , 601815 , 615661 , 629320 ,
642788 , 656059 , 669131 , 681998 , 694658 ,
707107 , 719340 , 731354 , 743145 , 754710 ,
766044 , 777146 , 788011 , 798636 , 809017 ,
819152 , 829038 , 838671 , 848048 , 857167 ,
866025 , 874620 , 882948 , 891007 , 898794 ,
906308 , 913545 , 920505 , 927184 , 933580 ,
939693 , 945519 , 951057 , 956305 , 961262 ,
965926 , 970296 , 974370 , 978148 , 981627 ,
984808 , 987688 , 990268 , 992546 , 994522 ,
996195 , 997564 , 998630 , 999391 , 999848 , 1000000
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thanx a lot sir for such a early response... but i need to know if i can able to store this values in a cpld..? if yes then please let me know the family of (low to medium cost)cpld which are hving onchip memory..i,m working on a cpld based fsk...may be i will ask for some more help...thanking u sir..
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I know MAX10 has one, through M9K blocks that should be configured as ROM through the .mif file.
how about to create a simple decoder? degree is input and sine value is output if simple ROM not available. please read more on http://www.altera.com (http://www.altera.com) http://https://www.altera.com/products/fpga/max-series/max-10/support.html (http://https://www.altera.com/products/fpga/max-series/max-10/support.html) https://www.altera.com/products/cpld/max-series.html (https://www.altera.com/products/cpld/max-series.html)- Mark as New
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sir, FOR MY FSK DEMODULATION FIRST THE SINEWAVE SHOULD BE PASS THROUGH ADC AND THEN TO CPLD. I NEED TO DESIGN A FIR FILTER FOR DEMODULATION. FOR THAT I HV TO FIND OUT FREQUENCY SPECTRUM OF ADC OUTPUT. COULD YOU JUST TELL ME HOW TO FIND OUT THE FREQUENCY SPECTRUM..IS THERE ANY SOFTWARE FOR THAT OR MATLAB CAN DO THAT?..THANKS IN ADVANCE

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