embedded software FPGA control

[Altera_Forum]

I need your help. 

I thinking of buying the new MaxV CPLD demo board.  I known how to program in C and a beginner with Verilog.  I want to write programs like the demo programs that come with the demo board, but I don't see any example of this code. I'm not looking for the Windows part of the program; I want to know how to write C programs to interface through the USB port to read and write to the board. Command line interface is fine, windows part is an added bonus.  I understand how to read and write to the serial and parallel port in DOS, but USB and Ethernet interfaces have me confused.  If I can figure this out, I want to do the same thing with a PCIe interface.  Another question - I have programmed an Atmel Microcontroller - do these demo programs use a state machine or an embedded processor. What do you think is the best way to go? I start college next year and want get a head start.  Any help would be great.

[Altera_Forum]

You first need to decide what you want to do, and then select the device. 

 Your email starts with you indicating that you want to buy the MAX V CPLD. However, much of what you want to do indicates you really should be buying an FPGA based board.  What's the difference? Well, I haven't read the MAX V data sheets, but the other MAX CPLDs are devices with logic cells and Flash, and are great for 'instant on' logic, such as an FPGA configuration controller for a larger device. However, they don't have embedded memory blocks, and DSP blocks that you'll find in an FPGA, and you really don't want to miss out on those! In fact, I'm pretty sure the NIOS processor relies on the device having on-chip RAM.  What you really want to buy is something like the DE2 board (or DE1). Take a look at the Terasic web site, and see if you can afford any of them. Terasic makes these boards for the Altera University Program. If you are a student, you might be able to get student pricing for the boards; check out the Altera University Program web site and see what the requirements are.  Another option is the Arrow BeMicro and BeMicro-SDK boards (both under $100). The BeMicro board can be accessed via the serial port on its USB interface. The BeMicro-SDK is newer, but they've dropped the serial port, so the USB interface is only for the USB-Blaster programmer. You can use that interface from Altera's Quartus tools. In fact, its probably perfect for doing NIOS II development, since the IDE can communicate with the processor via the USB-Blaster interface.  The one caveat with the BeMicro-SDK is that its fairly new, so not well supported yet, eg. the DDR on the board is not supported by the Altera IP, but there is an OpenCore license available.  The BeMicro-SDK has an ethernet interface, as does the DE2 board. If you want to test PCIe, then you need a more powerful FPGA board. For example, the Stratix IV GX development kit is $5k. There are Cyclone boards too, but they're also $$  Feel free to ask more about these kits.   Cheers, Dave

[Altera_Forum]

I agree. The Nios II soft processor core uses on-chip memories to implement the register set, cache, and debugger memory so it's not possible to synthesize it for any MAX device.

[Altera_Forum]

Thanks for the replies. 

 I have looked at the BeMicro and BeMicroSDK. It looks like I will buy the SDK version.  I do like the Windows interface examples of the MaxV video demo, which the BeMicro does not have in that video demo or example software, which I downloaded.   altera.com/education/webcasts/videos/videos-maxv-devkit.html  I will review the source code and when I get the board, ..... I will have some additional questions.  I am reviewing the example SDK sample code and design files. I should have more questions in a couple weeks. :)  Thanks for your input

[Altera_Forum]

The BeMicro-SDK is a good starter board for you. 

 When you buy it from Arrow, also buy the 'BeMicro Protoboard'. This is a breakout board that can plug into the edge-connector on the BeMicro or BeMicro-SDK. That way you will have some GPIO on 100-mil headers to play with.  The BeMicro-SDK does not have a USB-serial interface, it only has the USB-Blaster interface. This interface allows you to communicate between Quartus and the board for programming, and between the NIOS II IDE and a NIOS processor during debugging. The NIOS console can also use this interface.  Once you've got familiar with all that, you can ask questions.   I've just received my BeMicro-SDK, but won't get a chance to play with it for a week or so. Feel free to ask questions, and I'll provide code (VHDL). Look around the forum messages, and you will see that others have this board too, so you will not be alone if you cannot figure something out.  In my experience, the example code provided with development boards is not that great. What you really want to do is something like;  1) Look at the schematic 2) Get a pin assignments file, eg. from the development kit examples, and then check it by comparing it to schematic, or just write it from scratch using the schematic. 3) Create an example project that does not really do much other than drive the LEDs to a known pattern. 4) Place-and-route the design. 5) Download it, and see your LED pattern.  However, this sequence should be followed with a little caution, as it is not appropriate for all boards.  For example, after you place-and-route a design, you should look at the Pin Planner view of the device (Assignments->Pin planner). Look at the I/O standards assigned to the pins you have used, eg. 3.3V LVCMOS (default). Now go check your schematic again. If the I/O banks are not 3.3V, then you need to assign a logic level to the pins you've used. I just looked at the BeMicro-SDK schematic, and the VCCIO pins for banks 1, 2, 3, 4, 5, and 6 are 3.3V, but those in banks 7 and 8 are 1.8V (the mobile DDR pins). When it comes time to play with the DDR, then you will need to get those pins assigned correctly. So long as you do not use them, and they remain tri-stated, you do no need to worry.  The DDR pins only remain tri-stated if you make sure of another setting in Quartus. In the Assignments->Device, Device and Pin Options, Unused Pins tab, there is a setting for 'Reserve all unused pins' which should be set to 'As input tri-stated', or 'As input tri-stated with weak pull-up'.   A practical FPGA design involves more than just the Verilog or VHDL source, it also involves a constraints file (device type, pin assignments, pin logic standards, etc), and a timing constraints file.   For the initial simple project above you can create a project for the BeMicro-SDK Cyclone IV device, create a simple top-level design that turns the LEDs on or off in a pattern, check the unused pin state, then P&R the design, and then download. Once you've succeeded in that, you'll feel a lot more confident, and you can start to blink the LEDs!  Cheers, Dave