error with pin assignment

[Altera_Forum]

Hi, i am trying to do a pin assignment but by compile i get this Error Message: 

 "Error: Can't place multiple pins assigned to pin location Pin_AD25 ( IOC_X95_Y2_N1)  Info: Pin iSW[7] is assigned to pin location Pin_AD25 (IOC_X95_Y2_N1)  Info: Pin ~LVDS195p/nCEO~ is assigned to pin location Pin_AD25 (IOC_X95_Y2_N1) Error: Can't fit design in device"   i don't know where thie Pin LVDS195p/nCEO is defined   could someone help me?   Thanks

[Altera_Forum]

Go to the Assignments menu > Device 

Click on the "Device and Pin Options" button Go to the "Dual-Purpose Pins" tab Double click on nCEO Select "Use as regular I/O"  By default nCEO is used as a programming pin (to chain several FPGAs during configuration). You need to tell Quartus that you want to use this pin as an I/O instead.

[Altera_Forum]

--- Quote Start ---  Go to the Assignments menu > Device Click on the "Device and Pin Options" button Go to the "Dual-Purpose Pins" tab Double click on nCEO Select "Use as regular I/O"   By default nCEO is used as a programming pin (to chain several FPGAs during configuration). You need to tell Quartus that you want to use this pin as an I/O instead.  --- Quote End ---       thank you for your answer

[Altera_Forum]

Probably you defined an I/O differential standard (i.e.LVDS) on another pin which would need AD25 as its complementary. 

Check pin assignment or in assignement editor for any reference to AD25 and to its complementary pin (LVDS195n, refer to your device datasheet)  Cris