extend PCIe interrupt with Qsys

[Altera_Forum]

Hello, 

I want to implement a project on Cyclone IV GX FPGA which produce customs interrupts which are sent to the kernel through PCIe using MSI.   From the side of the linux driver pci_enable_msi() is called and return with success, indicating that my card is capable of MSI. I also call request_irq() and through /proc/interrupts file I can see that my driver is successfully waiting for MSI interrupts.  My question is : How can I use Qsys to implement a mechanism that will produce interrupts that the driver will be able to recognize? What components and with what connections should I use?  Thanks in Advance Antonis

[Altera_Forum]

--- Quote Start ---  Hello, My question is : How can I use Qsys to implement a mechanism that will produce interrupts that the driver will be able to recognize? What components and with what connections should I use?   --- Quote End ---    1) Read the PCIe user guide.  2) Look at some example designs.  3) Modify and example design to do what you want.  There are quite a few threads about the PCIe interface here (try the IP section).  Nial.

[Altera_Forum]

I have read the PCIe user guide and I found that the signal app_msi_req produces the interrupts to pci express. 

 Also I check the followed registers that are responsible for generating msi interrupts:   1. Set the MSI Enable at bit[0] of MSI Control Status register, this bit is mapped to bit[16] of configuration space register offset 0x50.  2. Set the Interrupt Disable at bit[10] of Command Register at configuration space offset register 0x4 to disable legacy interrupt.  3. Set the Bus Master at bit[2] of Command Register at configuration space offset register 0x4 to enable the ability to generate MSI message.  Every 1 sec I enable the app_msi_req inorder to see every 1 sec interrupts in my driver. app _msi_tc and app_msi_num assigned to zero. Still I can not see interrupts in my driver. The interrupt handler is not called.    I would like to ask: 1) What should I check more? Do I miss something important?  2) How can I simulate this desing to check if I get app_msi_ack=1 ??  3) Should I change more signals?  Thanks in Advance!

[Altera_Forum]

I have asserted RxmIrq and app_msi_req signals (Signals that are responsible for Interrupts as it's said in the IP compiler user Guide) every 100 cylces. 

In simulation, I saw that it is asserted app_int_ack every time that RxmIrq and app_msi_req are asserted. BUT NOT app_msi_ack is turn to 1.   I guess that this is happend because of the configuration of the testbence ( INTx is enabled instead of MSI).  Nevertheless I can not see interrupts from the side of the software.  Any advices ? Do I miss something important?  How can I set the simulation from INT to msi mode?  Thanks you.

[Altera_Forum]

Also I want to ask : why there are some signals that are terminated.?? 

some signals are :  .aer_msi_num (5'b00000), // (terminated) .app_int_sts (1'b0), // (terminated) .app_msi_num (5'b00000), // (terminated) .app_msi_req (1'b0), // (terminated) .app_msi_tc (3'b000), // (terminated)   is there any reason that are terminated?

[Altera_Forum]

I'm sorry Toniss, I was being facetious as I thought you were looking for someone to do what you wanted without putting 

any work in, this is obviously not the case.  Good luck, there are a lot of gaps in the PCIe implementation/ tools / documentation.   Nial.