fpga board push button questions

[Altera_Forum]

I just wanted to clarify: does pushing the button correspond to a single pulse? And is the default state of the button a logical 0, and when pushed is it a logical 1?

[Altera_Forum]

I doubt the button is de-bounced. As for the logic levels, you need to look at the schematic of the board you're working with to see which logic level they are set to by default.

[Altera_Forum]

How do I go about debouncing the button? It's a stratix ii gx si board.

[Altera_Forum]

If you want to make a single clock pulse width signal from a physical button push, I suggest first double registering your input, then making a simple state machine that triggers when the button is first pushed, and verifies the button has not been pressed for a period of time to assume the button press has finished. 

 The pulse can happen when you transition from the idle state, to the "waiting for the button to finish being pressed" state.

[Altera_Forum]

You also can find useful information here: 

 http://www.fpgarelated.com/usenet/fpga/show/78095-1.php

[Altera_Forum]

I think you can find some code/sopc component in the shared materials thread in the NIOS 2 forum.