help with hyperlynx simulation for cyclone2

Altera_Forum · ‎09-24-2008

hi guys..

i am new to this forum.. i am trying to do signal integrity simulations(hyperlynx) for my current design which has a mcf5282 processor, cyclone2 fpga, max 2 cpld, flash.

data and address bus comming for the processor is buffered with a bi-directional buffer SN74LVCH16245 and then goes to the rest of the devices. after loading the ibis files i can do simulations for one direction only ie when the processor is driving the bus (writting to fpga).

i cannot find any option to change the direction of the buffer in hyperlynx, hence i can check the signal levels when the fpga is driving the bus.

can some pls tell me how to change the direction of the buffer in hyperlynx..

thanks

tama

Altera_Forum · ‎11-04-2008

Hi,

In Hyperlynx, click SELECT-> COMPONENTS VALUES AND MODEL SETTING-> IC tab-> choose OUTPUT in BUFFER SETTING.

I hope this help, let me know if that works.

Cheers