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how can i get part of std_logic_vector

Altera_Forum
Honored Contributor II
2,738 Views

hello  

 

i want to get a part of std_logic_vector  

i have signal sec_vector : STD_LOGIC_VECTOR(5 DOWNTO 0) ; 

when i use sec_vector(3 downto 0) i get the error -> Cannot resolve slice name as type std.standard.bit_vector. 

 

what can i do ?
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Altera_Forum
Honored Contributor II
1,823 Views

Sounds like you're trying to assign a std_logic_vector to a bit vector. They are not the same thing. 

 

otherwise, sounds like you're doing it correctly. 

 

my_other_vector <= sec_vector(3 downto 0);
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Altera_Forum
Honored Contributor II
1,823 Views

my error sorry

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Altera_Forum
Honored Contributor II
1,823 Views

type missmatch

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