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hello
i want to get a part of std_logic_vector i have signal sec_vector : STD_LOGIC_VECTOR(5 DOWNTO 0) ; when i use sec_vector(3 downto 0) i get the error -> Cannot resolve slice name as type std.standard.bit_vector. what can i do ?Link Copied
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Sounds like you're trying to assign a std_logic_vector to a bit vector. They are not the same thing.
otherwise, sounds like you're doing it correctly. my_other_vector <= sec_vector(3 downto 0);- Mark as New
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my error sorry
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type missmatch

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