how do you utilize dedicated register chains

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

how do you utilize dedicated register chains

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has anyone successfully written some code that will utilize the dedicated register chains in the cyclone devices? I am using a cyclone iv device. I want to measure the delay through the dedicated register chain paths. these appear to be similar in structure to the dedicated carry-in carry-out paths in the combinatorial part of the LEs.

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