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how to measure the power consymption of the DE0 core

Altera_Forum
Honored Contributor II
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I want to know how to measure the power cunsumption of my FPGA only, not the whole board. Is it possible to insert a low value resistor in the power supply of the FPGA? Since I need to investigate the power consumption changes of the instruction set reduced of one IP core. Can someone tell me how to measure this power?

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Altera_Forum
Honored Contributor II
835 Views

have you used the Early Power Estimator or PowerPlay tools?

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Altera_Forum
Honored Contributor II
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I am a newer, I just heard about the powerplay tool, but never used this before, will it give a precise value of the power consumption of the CPU core? Thank you for your reply.

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Altera_Forum
Honored Contributor II
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you could do a PowerPlay analysis before and after your change to see what the delta in power looks like

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Altera_Forum
Honored Contributor II
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Thank you!I will have a look. Can I ask another question? I just did download a simple counter to my FPGA, and it will automatically work. But in this experiment, I need to use the openmsp430 core which is written in verilogto test a program which is written in C language. How can I use FPGA to realise using my openmsp430 core run the C program. Then I can try to measure the power. I don't know how to do this. Should I download both program to FPGA use quartus II, or first use code composer studio to change the c program into a hex fire, then try to download to memory of FPGA and use quartus II to download the open core to the flash, then will it work? sorry, I really confuse how to realisi.

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Altera_Forum
Honored Contributor II
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i'm not sure how the processor is meant to boot 

 

if its like a Nios it is possible to boot it entirely from a chunk of on chip memory. in that case you would need to compile the C code into a .hex to initialize the on chip memory during a Quartus compile
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Altera_Forum
Honored Contributor II
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So you mean I neeed to download my hex fire to the SDRAM, and synthese the FPGA, Do I need to figure ou the connection between the FPGA and SDRAM?so then when I synthese the FPGA, it will automatically read the hex fire in the SDRAM.

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