input[12] bit width for dac in squre root calculation.

[Altera_Forum]

in a square root operation of 4sinwt using altfp_sqrt block . i have taken 32 bit input and 32 bit output and clock was system clock from pin 28. so program compiled succesfullt. now for showing it in cro through DAC which 12 should i select from output 32 bit for input of dac. 

if my program in not correct then please explain.....

[Altera_Forum]

altfp_sqrt is using floating point numbers which have to be converted to integer before you send it to a DAC. 

 I think you are asking about a digital signal processing respectively number crunching problem which isn't specific to FPGA.   You should get clear about the expected data number ranges. Pencil and paper method is probably the best way.

[Altera_Forum]

If you can afford to generate the square root 1 bit (of result) per clock (maybe 2 clocks at high clock rates), then the 'schoolboy' method works very well in binary and will probably use a lot less logic. 

For 12 bit input I think you could just chain 6 subtract + conditional-mux blocks...