is there a multi core FPGA board

[Altera_Forum]

is there a multi core FPGA board for practice parallel VHDL algorithm? 

if no, when will sell

[Altera_Forum]

??:confused: 

 you can instantiate numerous elements like processors (nios ii, arm, pic(?), cutom...)as many as you can fit[/B]. Since few years, we have seen FPGA in which the designer instantiate multiple Nios II processor which a good interconnect  see altera examples you can do this with any Altera Board, or any other board which implement FPGA, just take good examples.  I have never made multi-processor designs, but sure it is possible.  EDIT : Parallel VHDL Algorithm ?? VHDL is de facto parallel. I suppose you mean parallel algorithm like multithread ?

[Altera_Forum]

You can stick several algorithms in parralell inside the same FPGA.

[Altera_Forum]

any example for reference?

[Altera_Forum]

dinigroup (http://www.dinigroup.com/new/altera.php#stratix5)has several board with multiple Altera FPGAs.  

Here is the link: http://www.dinigroup.com/new/altera.php#stratix5

[Altera_Forum]

you can can be joined Multiple DE3s together to increase design gate count and performance. 

 see http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=164&no=260

[Altera_Forum]

I have Arria and Stratix kit boards from Alter and need to have two NIOS II cores running on the same FPGA ... Currently I have one with its own IMEM for code and data. 

I want to add a second NIOS II with its own IMEM for code and data . Is it that easy ? Both would target the PCIe IP as a slave and each would have its own dedicated scratchpad data IMEM that the NIOS could access and a PCIe BAR master could access.   Is there any example for this or do I reference the programming guide. My main unknown is how Eclipse would handle two instances of the NIOS II core.  The intention here is to get two independent activities on the PCIe link where one NIOS II controls one and the other NIOS II controls the other . To try using one NIOS II core and have some "thread arbititration" scheme may be possible but doesn't sound as straight forward.