jic_file_booting_with_ddr3_as_exception vector parameter of NIOS II

[SERMASWATHIKA]

Hi Team,

   We are trying JIC file programming in our design. Initial part we have tried JIC file programming with OCM as exception vector of NIOS II Processor.

    We successfully checked that in board.

    Now we are trying JIC file programming with DDR3 as exception vector of NIOS II processor.

    In the DDR3 JIC setup, FPGA boot up is working properly and firmware is not working properly.

The following settings are used for JIC File programming using DDR3:

    

    

please give guidance to setup the jic file programming with ddr3 memory.

 

[JingyangTeh_Altera]

Hi

Sorry for the late response.

Could you try unticking all checkbox in the hal.linker option?

https://www.intel.com/content/www/us/en/docs/programmable/683820/current/summary-of-nios-ii-processor-vector.html

Regards

Jingyang, Teh

[JingyangTeh_Altera]

Hi

Any update on this case?

Regards

Jingyang, Teh

[JingyangTeh_Altera]

Hi

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Regards

Jingyang, Teh

[JingyangTeh_Altera]

Hi

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Regards

Jingyang, Teh