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Altera_Forum
Honored Contributor I
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lpm_add_sub - signed

Sorry for maybe a silly question but my brain stopped working. 

I add 2 9-bits signed numbers. The result is also 9-bits. what do i do with the overflow bit?  

To illustrate: 

logic signed [8:0] data_a; 

logic signed [8:0] data_b; 

logic signed [8:0] result_temp; 

logic signed [9:0] result ; 

logic overflow;  

adder_module U1 (.clock(clk), .dataa(data_a), .datab(data_b), .overflow(overflow), .result(result_temp)); 

 

assign result = overflow + result_temp; 

 

or I have to do this: 

assign result = {overflow, result_temp}; 

 

Interested especially when deal with negative numbers. And if my result signal is much larger than [8:0] result_temp. 

 

I've tried simulate in Modelsim and even if my "result_temp" is negative I always get positive "result".
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