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m9k memory block reading in cyclone3

Altera_Forum
Honored Contributor II
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hi 

i created ram with two ports (one read and one write) in cyclone3 using quartus. while reading data from ram ,read data is changing only at the end of address in simulation,ie 0 location data is appearing at 1st location, 

please help me any one 

with regards
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

reading data from ram ,read data is changing only at the end of address in simulation,ie 0 location data is appearing at 1st location 

--- Quote End ---  

 

 

This is normal as the address and data of the RAM blocks from the MegaWizard are registered by the clock. This means that there is a delay of one clock cycle before you see the result of a specific address during a read cycle. 

 

When you also add registers at the output, the delay will be two clock periods.
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