microcontroller for programming FPGA over JTAG

[Altera_Forum]

I want to use a microcontroller to program my FPGA via the JTAG port. 

I would like to connect the microcontroller to my PC via it's USB interface. (The microcontroller has a USB interface built into it.) That way I could download the FPGA configuration through the microcontroller's USB interface to the FPGA.  Is there a way to trick quartus into thinking my microcontroller is a usb blaster, so I can use it to program my fpga and debug with signal tap?  I realize the solution might involve a custom windows device driver. I'm just not sure what the driver needs to do in order to work with quartus properly.  Thanks!

[Altera_Forum]

I wonder, why you want to use a microcontroller for this purpose. A plain FT2232 USB interface device can act as a USB blaster replacement, using the BeMicro driver, as discussed in this thread: 

http://www.alteraforum.com/forum/showthread.php?t=20490  A principle option to replace the original USB Blaster would be to emulate the FTDI FT245 device, and the hardware acceleration built into the USB Blaster CPLD.  To connect your own USB driver at the PC side, you would need a documented interface to the Altera JTAG server, which obviously isn't available.

[Altera_Forum]

Although the USB-Blaster protocol is undocumented, there is this project: 

 http://ixo-jtag.sourceforge.net/archive/ixo_de_usb_jtag.html  This link is the same project that FvM pointed you to in the other thread.  Also take a look at the debugger core on OpenCores.org:  http://opencores.org/project,adv_debug_sys  It looks like someone has figured out how to control the USB-Blaster as a general purpose debugger. You could use this to figure out the software interface to a real USB-Blaster, and then emulate with your micro.  I've not looked at this stuff, so I have no idea whether it works. I am interested in hearing if you have any success ...   Cheers, Dave

[Altera_Forum]

Thanks for the replies! 

 I want to use a microcontroller in my design to program my fpga at power on time, by reading the configuration bitstream from a nand or nor flash, then programming the fpga via passive serial connected to the microcontroller.  I need the micro to do other things in my system. Also, I am limited in the number of pins I can break out from my PCB. My PCB space is limited. So it would be an attractive option to use the micro's onboard USB port to allow for programming and debugging my FPGA via JTAG. Adding an additional PHY chip such as FT2232 and supporting EEPROM might be doable, but would be more elegant solution to just use the micro, since I have to have it in my design anyways...

[Altera_Forum]

--- Quote Start ---   I want to use a microcontroller in my design to program my fpga at power on time, by reading the configuration bitstream from a nand or nor flash, then programming the fpga via passive serial connected to the microcontroller.   --- Quote End ---  This is a much simpler proposition then.  You just need to wire the FPGA configuration pins for passive serial, or fast passive parallel mode, and toggle the pins at the FPGA to program it appropriately. This is all described here for a VHDL implementation, but you'll get the picture:  http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/fpga_configuration.pdf)  Cheers, Dave

[Altera_Forum]

--- Quote Start ---  So it would be an attractive option to use the micro's onboard USB port to allow for programming and debugging my FPGA via JTAG. Adding an additional PHY chip such as FT2232 and supporting EEPROM might be doable, but would be more elegant solution to just use the micro, since I have to have it in my design anyways...  --- Quote End ---    I see, that emulating an USB Blaster interface can be reasonable in this case. As Dave mentioned, the ixo.de project does basically the same with a Cypress FX2. To understand the requirements, you can e.g. trace the USB Blaster communication with an USB software monitor. You'll notice, that besides transporting the serial data stream, an FTDI device must at least support the additional requests to read the EEPROM content on initilization.  Thanks to Dave for mentioning the opencores project which I wasn't yet aware of. It does the opposite of your intented project, using the USB Blaster as a general JTAG interface.   This is quite easy on the PC driver side, because it can rely on the existing FTDI drivers. You must understand however the special USB Blaster hardware acceleration protocol. In fact, there's a number of professional JTAG tools, that are, among others, supporting USB Blaster as JTAG interface.

[Altera_Forum]

--- Quote Start ---  This is a much simpler proposition then.  You just need to wire the FPGA configuration pins for passive serial, or fast passive parallel mode, and toggle the pins at the FPGA to program it appropriately. This is all described here for a VHDL implementation, but you'll get the picture:  http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/fpga_configuration.pdf)  Cheers, Dave  --- Quote End ---    Dave, thanks for the link. Lots of nice detail in there. Unfortunately, this solution does not address the need for debugging via JTAG. It only addresses programming the FPGA. I need to be able to use signal tap and the nios II EDS debugger. I don't want to have to break out all of the FPGA JTAG pins to a connector. That's why I'd prefer to use the USB on my micro.  Regards.

[Altera_Forum]

--- Quote Start ---   Unfortunately, this solution does not address the need for debugging via JTAG. I need to be able to use signal tap and the nios II EDS debugger. I don't want to have to break out all of the FPGA JTAG pins to a connector.   --- Quote End ---  Unfortunately, without emulating a USB-Blaster exactly, you will not get the functionality you want.  You could probably get most of the functionality you want working via a custom USB interface, however, it may be more work than it is worth. You would still need to wire up the JTAG pins on the FPGA to your micro, and then implement the JTAG device protocols in your micro software. Given that you've got that wiring, you may as well include a JTAG header.  I've looked at the Virtual JTAG protocol, and that's pretty straightforward (though the simulation model is completely broken). You could use this to implement a JTAG-UART for processor interfacing (or reverse engineer the JTAG-side of the Altera JTAG-UART).  The NIOS debugger interface and the SignalTapII protocol would probably require reverse engineering (using SignalTapII to view the JTAG transactions).  Did you really want to go this route? It might be easier to add a JTAG header on your board for using when debugging, and then have your USB microcontroller and a UART interface to the FPGA for 'normal operation'. I think once you've got your FPGA programmed and your first 'Hello World' program running, you can do a lot of debugging via the normal serial interface over your micro's USB interface. Having to connect a USB-Blaster to debug the more difficult problems will be a lot less work than the reverse engineering of the JTAG protocols.  Cheers, Dave

[Altera_Forum]

I heard of an arduino project (not sure where the link is now) that maybe you can check out.. would be a nice feat to have.. configure FPGA using uC

[Altera_Forum]

--- Quote Start ---  I heard of an arduino project (not sure where the link is now) that maybe you can check out.. would be a nice feat to have.. configure FPGA using uC  --- Quote End ---  Configuring an FPGA using a microcontroller or processor is simple;  http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/fpga_configuration.pdf)  Its emulating a USB-Blaster so that Altera tools recognize it that is the hard part. The original poster wanted to use the NIOS II debugger, etc., via his custom interface, and that is not easily implemented.  Cheers, Dave