The only way you can guestimate is configure a NIOS with approximately the number of peripherals and features that you want, find out how many logic elements/fpga resources that uses and divide that number into the total number of resources on the target FPGA (I would suggest multiplying that by a safety factor of say 50% because of unplanned contingencies and future expansion, probably not more than 70% as then your chip is starting to most likely become pretty congested). That might be a decent first order approximation.
