Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21599 Discussions

off-chip ram issue..

Altera_Forum
Honored Contributor II
2,099 Views

hi, 

we created off-chip ram verilog code with avalon slave,but this off-chip ram is not visible for reset vector and exception vector of nios cpu and also this is not visible for data and programe memory in the nios IDE. so can you please provide a design example for above mentioned application
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
640 Views

Open the component editor on your custom component, go to the Interfaces tab, and in your Avalon slave interface, open the "Deprecated" section and check the "Memory device" option. 

Contrary to what the name suggests this option isn't deprecated at all and is required to use the device as memory in the IDE.
0 Kudos
Altera_Forum
Honored Contributor II
640 Views

tnx i cleared that issue....

0 Kudos
Altera_Forum
Honored Contributor II
640 Views

how to access the megawizard ram from nios IDE...... 

 

 

--- Quote Start ---  

Open the component editor on your custom component, go to the Interfaces tab, and in your Avalon slave interface, open the "Deprecated" section and check the "Memory device" option. 

Contrary to what the name suggests this option isn't deprecated at all and is required to use the device as memory in the IDE. 

--- Quote End ---  

0 Kudos
Altera_Forum
Honored Contributor II
640 Views

The procedure I described must be made from SOPC builder, not the IDE. After that you must regenerate the SOPC system. Then go to the system library properties in the IDE and the RAM should be there.

0 Kudos
Reply