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one problem in simulate IP core.(SDRAM controller)

Altera_Forum
Honored Contributor II
‎06-13-2010 02:02 AM
1,136 Views

Hi,everybody. 

I creat a new project. And create a sdram controller with the plug-in manager. At last, the manager create a new subfolder named "testbench" . and there is a vhdl file(**_tb.vhd) in it. 

I want to simulate the design. But, when I create the waveform file, I cannot find the nodes in **_tb.vhd with node finder. In the dialog box "select hierarchy level", there are only the main project But no component in the new subfolder "testbench". And the **_tb.vhd is the the new subfolder. 

What can i do to find the nodes in **_tb.vhd?  

thanks.
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Altera_Forum
Honored Contributor II
‎06-14-2010 04:11 PM
366 Views

you cannot use HDL test benches in Quartus II Simulator. you'll have to use ModelSim-Altera Starter Edition which is free to use an HDL test bench.

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