one processor access multi ochip memory??

[Altera_Forum]

hi, 

how can i access multi onchip memory with one processor! and can i use a mutex or another component? tk for all members

[Altera_Forum]

If both memories are attached to the processors data bus then the processor has access to both. At that point it's just a piece of memory located at a specific address on the processor's bus. 

 Not sure what your mutex question is. SoPC Builder provides a mutex component or you can write your own.  Jake

[Altera_Forum]

thk you, 

but my question is : it is possible use one mutex by one processor to access multiple onchip memory. otherwise it is possible access theses memories through one mutex. if it is possible, how can i do this. best regards

[Altera_Forum]

To my understanding, the mutex is used when there are more than one processors trying to access to a single resource eg. onchip memory. The mutex is like "the rights to access a peripheral". Hence whichever processor has aquired the mutex can access your memory and the other processor cannot... or should I say should not.  

 If there are multiple memories connected to a single processor in an sopc system, you can access them in many ways. > If you want your processor to manage them and access them for its data memory, stack or heap, then you can control that using the "system properties" dialog box in the NIOS II IDE for that project. > If you want to manage the memory manually like using the memory to store some data, you can do something like use pointers and map out variables and structures by urself. All depends on what you want to do... Hope this helps... regards.

[Altera_Forum]

Haven't officially used a Nios for much more than hello world so far but from what I recall you just need to assign proper address ranges to instantiated memories (I think SOPC will also auto assign for you if you like, and generate header files with the address ranges as constants). A mutex is used when you have multiple processors hanging off the fabric trying to access a limited resource, such as a singular UART or SPI element or user instantiated module.