push button

[Altera_Forum]

Hello 

 I make a program in VHDL and i need a push button.  I don't kwon how i must do the follow thing.  When i push de button and let go then must count my counter en when i push de button again, de counter stops counting.  I hope that you understand me.  I hope that you can solve my problem.  Greetings Koen

[Altera_Forum]

--- Quote Start ---   I hope that you can solve my problem.   --- Quote End ---    No. You have to solve your own problems. However, we can help when you get stuck.  Push buttons are mechanical devices and they typically generate lots of transitions on the signal going to the FPGA, so you need to 'deglitch' the signals.  Here's what you can try to implement;  1) Synchronize the push-button signal to your FPGA clock. You can do this using a cascade of DFFs.  2) Implement a 'deglitch' circuit that detects whether the push-button signal has been low (or high) for at least a certain number of clocks. The output of the deglitch circuit should only change once the input has been high or low for that number of clocks (the number of clocks can be specified by a generic/parameter).  3) The deglitched push button signal goes to your counter enable, or to a finite-state-machine that in turn controls your counter enable.  Use the Modelsim simulator to create each component and test it. For example, you can start backwards, and work on the counter control FSM first. You can provide that logic with a clean push-button input signal and get it working. Then you can deal with the 'real-world' and create the logic needed to cleanup the push-button.  Cheers, Dave

[Altera_Forum]

Search for "debounce" to see what Dave is talking about. The glitching he is referring to sometimes looks like this: http://en.wikipedia.org/wiki/file:switch_bounce.jpg 

 So from the picture you can see a single button push may be detected multiple times. So that counter logic Dave is talking about makes sure the button is pushed long enough to filter out all the bounce (glitches).