Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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qsys project and bonding top hardware module with nios

Lili_7
New Contributor I
1,847 Views

hi every one

 

i have a question about designing with QSYS in QUARTUS II, which i will appreciate it if any one would help.

so basically i want to have  UI wich take some values from user and process them and then send them to FPGA for further progress. i want to do that with qsys.

so i have now a NIOS and input and output and memory all set up.

now i have a program in c in NIOS II software build tools for Eclipse wich does the ui and some math functions and i have 2 int numbers as outputs. how should i connect this outputs here(basically give this numbers) to my hardware part to use them? 

 

thanks in advance

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hareesh
Employee
1,818 Views

Hi,


I am working on this issue. please give me some time


Lili_7
New Contributor I
1,816 Views
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sstrell
Honored Contributor III
1,767 Views

It's a processor, so you should have the processor write the calculated data (Nios data bus interface) somewhere that can be accessed by other logic in the design, like a memory, either on-chip or off-chip.

hareesh
Employee
1,746 Views

Hi,

As we discussed in the call, please follow that steps. I'll make sure to arrange a call on Monday if you have any doubts about that again.


Thank you,


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Lili_7
New Contributor I
1,728 Views

this pic.outline shows precisely what i want to do.

so now i followed steps, in Eclipse i don't know how should i define inputs and outputs(which are nor accessible in de0 nano GPIO, but they are entered by user from keyboard) as you can see in pic.eclipse. and i am facing some errors.

i tried some ways like editing my bsp properties but i Count solve this errors.

best regards

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hareesh
Employee
1,651 Views

Hi,


please share your platform design or complete project files


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hareesh
Employee
1,579 Views

Hi,

 

UART example design project file sharing here. it helps you to read and write data from the host system(user). please try this design. in this project FPGA side UART is used so you need to add extra hardware (TTL to Voltage USB converters like RS232, and Max232) to communicate with your pc only then can you see the exact data. 

 

you can see FPGA to PC connection block diagram.

 

 

usb-uart-fpga-connection.png

 

Lili_7
New Contributor I
1,546 Views

thanks Hareesh,

it really helped a lot.

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hareesh
Employee
1,554 Views

Hi,


I think you got the solution for your quarry. I am going to close this case. if you want to reopen this please follow bellow link.


Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.




p/s: If any answer from the Intel Support is helpful, please feel free to provide rating with 4/5 survey on the support provided.


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