where is the pin map of 10M02SCE144I7G? I need help!

[HuaYuLiang]

I read the many data sheet and documents  which include the MAX 10 but I can't find them.

such as in m10_datasheet-683794-666319.pdf, I can find signal's timing and max frequency...and JTAG Timing Specifications, but where is the pin map table and footprint or package???

of cause I downloaded package from MOUSER, but I need pin map of 10M02SCE144I7G.

if possible, could you can give me a demo schematic about 10M02SCE144?

best regards to you.

YuLiang Hua

in CHINA

[HuaYuLiang]

Is there anyone??

[AqidAyman_Intel]

HI,

Thank you for reaching out to Intel Community.

I am deeply apologize to inform you that we do not provide the pin map.

Alternatively, you can view the pin location via Pin Planner tool in Quartus. You may find it by click the Menu Assignments, choose Pin Planner, or by clicking on the icon for Pin Planner.

You also can view the schematic symbols by downloading the odl. file provided through the link below:

Intel® FPGA Schematic Symbols, and select the Intel Max 10 device family.

[HuaYuLiang]

Thanks your reply!

I can't understand "we do not provide the pin map", why?? 

[AqidAyman_Intel]

Hi YuLiang,

I apologize I do not have the answer for that. Instead, we provide the pin list for 10M02SCE144 as attached.

In the Intel® MAX® 10 FPGA Design Guidelines, it mentioned the usage of Quartus Prime Pin Planner for I/O pin planning. You can refer to the below links:

1.6.1.2. Use the Intel® Quartus® Prime Pin Planner for I/O pin...

[AqidAyman_Intel]

Hello,

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