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I use the quartus ii 9.0 with the default configuration,nothing special.
When the first compilation, i found some problems in one module, so i take some inside critial signal of this module to the ouside pin to view them with the oscilloscope. Then compile the second time. What make me confused is than maybe this module have nothing wrong, but another one. It seems that the inside signal has some impact on the compilation result, why?Link Copied
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It could be timing failures. By routing a signal differently in the 2nd compile, the re-fit could cause previously failed timing paths to pass. This usually occurs in designs that are not fully syncronous.
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--- Quote Start --- It could be timing failures. By routing a signal differently in the 2nd compile, the re-fit could cause previously failed timing paths to pass. This usually occurs in designs that are not fully syncronous. --- Quote End --- Hi, it is not only a different routing. By routing the signals to pins your are changing the synthesis itself, because this signals could not removed ( if possible) anymore. Did you have timing violations in your design ( setup or hold ) ? Kind regards GPK
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--- Quote Start --- Hi, it is not only a different routing. By routing the signals to pins your are changing the synthesis itself, because this signals could not removed ( if possible) anymore. Did you have timing violations in your design ( setup or hold ) ? Kind regards GPK --- Quote End --- yes, there are several timing violations on the criticle path.
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--- Quote Start --- yes, there are several timing violations on the criticle path. --- Quote End --- Hi, you have have to solve the timing issues before you can expect that the design works fine. What timing violations do you have ? Kind regards GPK

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