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Hi all,
I would like to know about the technical specifications about this product
https://en.wikichip.org/wiki/intel/xeon_gold/6138p https://en.wikichip.org/wiki/intel/xeon_gold/6138p
which is the Intel Xeon Scalable processor with integrated FPGA.
- What is the amount of cache memory in the FPGA?
- Is the last level cache in the processor is shared with the FPGA?
- What is the UPI read and write latency?
Thanks in advance!
Nivetha
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Hello NivethaSukumar,
You can find the technical specifications for the Intel Scalable processors https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-scalable-datasheet-vol-1.pdf here.
Additionally, you can find the technical specifications on our support https://ark.intel.com/products/139940/Intel-Xeon-Gold-6138P-Processor-27-5M-Cache-2-00-GHz- site.
Best regards,
Sergio S.
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Hello NivethaSukumar,
We are following your question and would like to know if you need more assistance,
Best regards,
Sergio S.
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Hello NivethaSukumar,
We were wondering if you have any additional questions in regards to your post.,
Best regards,
Sergio S.
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Hello NivethaSukumar,
We are following your question and we would like if you have any more questions.
Best regards,
Sergio S.
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Hello NivethaSukumar,
Please contact us back in case you need further assistance.
Best regards,
Sergio S.
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Hi Sergio!
Sorry for the delay in my response. We did contact the Intel team and we are considering the Arria 10 FPGA for the feasibility study of our project.
However, I am interested to know about the performance details such the latency and bandwidth of UPI interface.
Have a nice day!
Thanks,
Nivetha Sukumar
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Hello Nivetha,
Let me check with the proper department and get back to you.
Best regards,
Sergio S.
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Hello Nivetha,
For support on the Aria 10 FPGA processor, please post your questions here:
https://forums.intel.com/s/?language=en_US
Best regards,
Sergio S.
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