here are the documents that have that information that you are looking for:
https://www.intel.com/content/www/us/en/processors/xeon/xeon-d-1500-datasheet-vol-1.html Xeon-d-1500 Datasheet Vol-1
https://www.intel.com/content/www/us/en/processors/xeon/xeon-d-1500-datasheet-vol-2.html Xeon-d-1500 Datasheet Vol-2
https://www.intel.com/content/www/us/en/processors/xeon/xeon-d-1500-datasheet-vol-3.html Xeon-d-1500 Datasheet Vol-3
https://www.intel.com/content/www/us/en/processors/xeon/xeon-d-1500-datasheet-vol-4.html Xeon-d-1500 Datasheet Vol-4
Please let me know if you need anything else.
Thanks for the information. Those datasheets are useful, but I'm still a little confused.
I see that in section 7.10 of Datasheet 1 it describes GPIO_USE_SEL as "GPIOBASE + Offset" (where the offset is the range 00h–03h depending upon the bank).
As an example lets pick pin 6 (SoC GPIO6). I know this is in the first bank - so the offset for GPIO_USE_SEL is 00h from GPIO_BASE. But what is GPIO_BASE???
Reading the datasheet for my supermicro motherboard it seems to indicate that the base address could be 0x500, however I don't see anything in these Intel datasheets to confirm that.
In section 7.1.5 it seems to indicate that GPIOBASE is a register with an offset of 48h–4Bh - but what is it an offset from?
In terms of operation I was originally thinking that if I knew the address of GPIO_USE_SEL, GP_IO_SEL and GP_LVL, then I could just program these to setup a GPIO pin.
But do I need to actually set the GPIOBASE register to some value first?
Thanks in advance, for your help.
At this point we have shared all the information that is visible to us. Since Xeon-D are designed for OEM (Original equipment manufacturer), you will need to get in contact with them if more detailed information is needed. Let me know if there is something else.