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OS: Linux CentOS 7.3 (Kernel 3.10).
Test Motherboards:
Motherboard A: ASUS P9X79 WS, ASUS X270 WS.
MotherBoard B: ASRock Xeon D1541 CPU(8-core, 12MB cache).
FPGA PCIe card 1, Virtex-7 FPGA board. Gen 3 PCIe x8 slot. Utilize on-board 4GB DDR3 SDRAM as deep FIFO for DMA. (proven high performance and good card).
FPGA PCIe card 2, Kintex UltraScale FPGA card Gen 3 PCIe x8. Utilize Internal FPGA RAM(Block RAM) as small FIFO for DMA.
Test Purpose: to verify the FPGA card can run on motherboard and transfer data for long duration and there is no data loss.
Test Results 1:
Card 1, Card 2 tested well on MotherBoard _A. it can acquire PCIe data at minimum 1.6GB/s to host for 8GB amount of data no problem.
Teat Result 2: Card 1 on MotherBard B. It can collect good data on Mother board B, but up to 4GB only(which is the FIFO size of Card 1). After the 4GB, there is periodic data loss after every 4GB. That means card 1 can run at least for 1 second good. Motherboard B(CPU Xeon D1541) can also collect for 1second of data all good.
Test Result 3: Card 2 on motherboard B. it can collect good data on motherboard B, for up to 24MB per ADC input only. After 24MB of data, there is periodic data los for every 24MB data at total speed of 1.6GB/s. This is about 0.03 second on CPU Xeon D1541.
Questions:
1). From the test results, it shows that if the FPGA board has a deep on-board FIFO, then DMA can run for longer duration(also means CPU can handle this speed at 4GB/s).
2). But if the FIFO size on FPGA is small, the CPU can only handle a short duration of data. But for this same FPGA board, it can run on ASUS motherboard for long duration.
3). I would like to check what could be the reason the CPU (Xeon D1541) can only handle small amount of data for the FPGA card 2(small FIFO size)?
4). What are the registers/settings we can set in Xeon D for improved performance?
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Hi MeiGuodong,
Thank you for sharing this information, I reviewed your inquiry but I wont be able to provide an answer for such an specific scenario, I'll make some research and be back with you as soon as possible, if there is further information that you may consider relevant for this case plesase feel free to reply to this message.
KenR
Intel Customer Support
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Hello MeiGuodong
Thank you for joining the community
To understand better the situation could you please let us know the following?
What kind of application or service is being affected by this data loss?
The motherboard A they are two desktop boards could you let us Know the processors that you have installed on then?
Regards,
Leonardo C.
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Hi Leonardo,
Thank you for your reply.
On P9X79 WS, it runs Intel i7 4700. (quad core).
on X270, it runs Intel i7 6700.
We are running a data acquisition application. the data are streamed in through PCIe FPGA card, transferred to host memory over PCIe. for the nature of the application, we do not allow the data to be dropped, because it loses information.
BTW, in the document,BDE91, it says "writing the IIO LLC Ways MSR results in an incorrect value".
I would like to check does increasing the IIO LLC WAYS increase the PCIe/DMA performance of the chipset?
Please let me know if you have any suggestions.
Mei Guodong
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Hello Mountainsea
Thank you for let us know more information about the case. Looking into the situation I will like to share the following link to better assist you with the questions related to the embedded Intel® Xeon® D processors please refer to the following links
https://www.intel.com/content/www/us/en/products/processors/xeon/d-processors.html https://www.intel.com/content/www/us/en/products/processors/xeon/d-processors.html
https://embedded.communities.intel.com/community/en https://embedded.communities.intel.com/community/en
You can also look for assistance with an authorized distributor of your own choosing for them to request a field application engineer for more information about the processor
Regards,
Leonardo C.
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Hello Leonardo,
I would like to follow up on this case:
Xeon D 1541 mother board.
We have a FPGA card which performs DMA to XeonD 1541's host memory. the FPGA FIFO size is 320KBytes. the PCIe transfer data rate is 1.6GB/s.
When we perform the DMA data transfer, it is observed sometimes the data are all good, there is no data loss.
However very often, the FPGA card reports a FIFO overflow. that means the chipset is holding the PCIe bus for more than 320K/1.6GB/s = 200us.
so I would like to check in Xeon D1541 cpu/chipset, is there any register settings that set the PCIe bus arbitration time and which guarantees the response to my FPGA card's PCIe requests timely?
any suggestions will be appreciated.
Thank you.
Mei Guodong
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Hello Mountainsea
Thank you for your response let me share with you that on this community we are able to assist boxed processors for detail information on the Intel® Xeon D 1541 we encourage you to refer to the Intel® Embedded Community to assist you on your request
Regards,
Leonardo C.
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Hello Mountainsea
Here is the link to the Intel® Embedded Community
https://embedded.communities.intel.com/select-display-name!input.jspa https://embedded.communities.intel.com/select-display-name!input.jspa
Regards,
Leonardo C.
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