Building a loadable kernel module for MIC?

[McCalpinJohn]

Sorry if this has been answered elsewhere -- I have not had any luck searching for info...

I like to use inline calls to the RDPMC instruction to do performance counter measurements around blocks of code.
User-mode execution of RDPMC requires that the CR4.PCE bit be set in the processor, and on our current system this is not set by default.
I have a simple loadable kernel module that sets CR4.PCE on all processors when it is loaded, but I can't figure out where to start looking in the MPSS distribution(s) for the kernel header and config files (along with any other instructions) needed to compile a loadable kernel module.  
It is pretty easy to find the files and instructions for the host, since we have the full RHEL 6.3 kernel distribution, but it is more confusing on the MIC.

Any pointers?

I also have a more complex loadable kernel module that creates a /dev/cpu//pmc device driver file that can be set to world-writable.
It is modeled on the MSR device driver but has internal "whitelists" and bit masks to allow access only to the performance monitoring MSRs and only to the bits that we consider "safe" (i.e., we don't allow enabling interrupts on counter overflow by this mechanism).   An ordinary user can then program the performance counters either using a command-line program (modeled after wrmsr.c from msrtools-1.2) or by opening the device driver file and using inline lseeks and writes.  This kernel module also sets CR4.PCE, so user code can read the performance counters directly using the RDPMC instruction.  We have versions of the module for CentOS 5 kernels and RHEL 6 kernels, but they are largely untested.  It should not be hard to port to the busybox kernel once I figure out where to get started.....

[Frances_R_Intel]

If you go to the page you downloaded the MPSS from, just below the list of files for each of the supported operating systems, you will find tar files containing source code. Download the version that matches your host OS, untar it in the same place you untarred the MPSS release, go to the mpss_gold_update_3/gpl directory and untar the files you find there. I think you will find the files you are looking for under the card/kernel directory. You will also find the code for the busy box in card/busybox. The kernel for the coprocessor is built using the gcc compiler. The cross-compiler for gcc for the coprocessor is in /usr/linux-k1om-4.7/bin on the host.

If you are programming at the kernel level, you might want to read: Intel® Xeon Phi™ Coprocessor System Software Developers Guideand Intel® Xeon Phi™ Coprocessor (codename: Knights Corner) Performance Monitoring Unitsif you haven't already. Both can be found on the Intel® Developer Zone:Intel® Xeon Phi™ Coprocessor web page under the Programming tab.

[McCalpinJohn]

Thanks!   I found the files, now to start playing....