FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
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Please see the known issues section of the release notes. These are not errors in your code, they are due to the way the Simulate tab works. In the Emulate tab they were automatically cleared before you saw the console, that feature is planned for a future release of the Simulate tab but is not there now.
