MBR Code for Enabling VT-x

[Infrared]

The CSM of my dual E5462 system does not enable VT-x, but does not lock it either.

I have written some MBR code to set the necessary 0x3A MSR bits. However, this will
only set the bits of a single register. As I understand it, there is at least one 0x3A MSR
per physical processor, and perhaps one per logical processor (core), of which there are 8.

I would appreciate advice on how to alter each instance of this MSR register. This is real
mode programming and there are not many free bytes available where the code can go.
Perhaps fewer than 50 bytes!

I am thinking along the lines of a broadcast IPI or perhaps hooking into entry 1Ch of
the IVT. But I am new to this kind of programming, and would welcome any advice or
codes snippets.

Thank you.

[David_O_Intel1]

Asking internally. Stay tuned. -d

[Infrared]

Quoting - David Ott (Intel)

Asking internally. Stay tuned. -d

Thank you very much.

[levicki]

Quoting - Infrared

The CSM of my dual E5462 system does not enable VT-x, but does not lock it either.

I have written some MBR code to set the necessary 0x3A MSR bits. However, this will
only set the bits of a single register. As I understand it, there is at least one 0x3A MSR
per physical processor, and perhaps one per logical processor (core), of which there are 8.

I would appreciate advice on how to alter each instance of this MSR register. This is real
mode programming and there are not many free bytes available where the code can go.
Perhaps fewer than 50 bytes!

I am thinking along the lines of a broadcast IPI or perhaps hooking into entry 1Ch of
the IVT. But I am new to this kind of programming, and would welcome any advice or
codes snippets.

Thank you.

After finishing BIOS initialization and entering bootblock code all AP (application processors) are in a Wait for SIPI state while the BP (Boot Processor) is executing code. Typically, OS wakes those APs right after the kernel initialization stage.

That means you would have to do roughly the following:

- Locate and parse MPS (or ACPI?) table to find out how many CPUs there are.
- Wake each one up, set the stack and segment registers, and send them an address where they should start executing code for VT enabling.
- Put each one back to Wait for SIPI state, preferably at the same BIOS location where they were halted before to avoid confusing the OS.

This involves a bit more code than it might fit in MBR.

In order to enable VT you need to check whether it is supported by the particular CPU and whether the MSR is locked or not (I am presuming you want to write a generic solution, if you do you will need those checks).

But there is a problem -- when you put computer into suspend mode (S3 state), CPU loses power so VT state isn't preserved and you need to reinit VT before passing control to the OS. That means you will most likely also need to hook the reboot vector in some way, and have a piece of code which will survive in memory, call your VT enable code, and then pass the control back to the OS so it can resume from S3.

As for particular implementation details I am afraid that I cannot be of much help.

[Infrared]

Quoting - Igor Levicki

[...]

This involves a bit more code than it might fit in MBR.

In order to enable VT you need to check whether it is supported by the particular CPU and whether the MSR is locked or not (I am presuming you want to write a generic solution, if you do you will need those checks).

But there is a problem -- when you put computer into suspend mode (S3 state), CPU loses power so VT state isn't preserved and you need to reinit VT before passing control to the OS. That means you will most likely also need to hook the reboot vector in some way, and have a piece of code which will survive in memory, call your VT enable code, and then pass the control back to the OS so it can resume from S3.

As for particular implementation details I am afraid that I cannot be of much help.

This is starting to look very challenging.

I've noticed there exists a VMWare workaround for such situations (VT-x not enabled, but unlocked):

http://communities.vmware.com/docs/DOC-8978

Unfortunately, Microsoft's Hyper-V apparently lacks anything similar to "hv.enableIfUnlocked = TRUE".

[Infrared]

Any final suggestions? ;) Thanks!

[David_O_Intel1]

I receeived the followingsuggestion from a fellow engineer:

"Try studying how it is done inXen. The latest released version is 3.4.0. Start with "vmx_cpu_up()" function that can be found in /xen/xen-3.4.0/xen/arch/x86/hvm/vmx/vmcs.c".

David Ott

[Infrared]

Quoting - David Ott (Intel)

I receeived the followingsuggestion from a fellow engineer:

"Try studying how it is done inXen. The latest released version is 3.4.0. Start with "vmx_cpu_up()" function that can be found in /xen/xen-3.4.0/xen/arch/x86/hvm/vmx/vmcs.c".

David Ott

Thank you for your help. I will look at that code and report back
with details if it inspires a succesful solution.