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I need to know if all CPUs on an SMP system will enter SMM mode when the chipset asserts SMI#, or if only one CPU will enter SMM (and what determines which CPU will enter SMM).
I apologize if this is the wrong place to ask - I've looked everywhere and can't find an answer, and this seemed like the least inappropriate place to ask...
From the Intel System Programmer's Manuals (e.g. section 24.14 SMM MULTI-PROCESSOR CONSIDERATIONS" on page 24-21 of volume 3B of the newest version), it states that "Any processor in a multiprocessor system can respond to an SMM".
The "82093AA I/O APIC" datasheet (Intel order number 290566-001) has a diagram on page 4 showing SMIOUT# from the I/O APIC being connected to both CPU's SMI# pins.
Is it correct to assume that all CPUs receive the SMI# and that they arbitrate or something (e.g. ignore SMI# if another CPU has asserted SMIACT# first), such that only one of the CPUs enters SMM?
Thanks,
Brendan
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Hello Brendan,
Thank you for posting your message on the Intel Software Network forum. While your question is outside the scope of topics normally discussed on this forum, you should be able to get support information relating to your topic from the Intel hardware design site at http://developer.intel.com/sites/developer/index.htm?iid=HMPAGE+RC_hardwareand the hardware design support site for processors at http://developer.intel.com/support/processors/index.htm.
For general product support, please review the support options at: http://support.intel.com.
For technical questions or design information concerning Intel components or products, you may wish to seek assistance from an Intel product representativeor a Field Application Engineer (FAE) at an authorized distributor via http://www.intel.com/buy/networking/design.htm under "Design Components".
I hope this helps.
Regards,
Jim A
IntelSoftware NetworkSupport
http://www.intel.com/software
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