X2Apic behavior in virtualized and non-virtualized modes

[Mohan__Vish]

My question is on the ICR offset of the local apic.

X2APIC normal operation:

From table 10.6:

MSR 0x830 - ICR

This msr covers both offsets 0x300(ICR_LO) and 0x310(ICR_HI) in the xapic mode.
Footnote at the bottom of the table seems to indicate any access to MSR
0x831 will cause general-protection violations.

X2APIC in vmx non-root

section 29.5 - virtualizing msr based accesses :

If APIC-register virtualization is 1 and ECX contains a value in the range
800H-8FFH, the instruction reads the 8 bytes from offset X on the virtual-APIC page into EDX:EAX, 
where X = (ECX & FFH) « 4. This occurs even if the local APIC is not in x2APIC mode.

1. If I do a rdmsr to msr 0x830 in vmx non-root and if the virtual apic page is at
address X then the result I get is from offset X+0x300 in EAX and X+0x304 from
EDX.

2. If I do a rdmsr to msr 0x830 outside of a virtual machine, the result I get
is memory-mapped offset of 0x300 in EAX and memory-mapped offset of 0x310 in
EDX.

It seems to me that the normal x2apic operation and the operation with apic
register virtualization differ in their results returned for this msr. Am I
interpreting the content of section 29.5 correctly? 

If the documentation is correct then any ideas on how to handle it in software?

Thank you.

[Quoc-Thai_L_Intel]

Here is some feedback that I got from my peer: "I don’t think it is an issue, one is for guest OS and the other is for host OS. - When the MSR is accessed in vmx non-root, the software is accessing the virtual APIC register in guest OS. - When the MSR is accessed outside of a virtual machine, the software is accessing physical APIC register in host OS. The original question seems to think the two values should equal which is however not true. " Regards, Thai