Software Tuning, Performance Optimization & Platform Monitoring
Discussion regarding monitoring and software tuning methodologies, Performance Monitoring Unit (PMU) of Intel microprocessors, and platform updating.

Configuring RAPL limits in Sandy Bridge Xeon processors

Nobin_M_
Beginner
6,337 Views

Hi,

I am trying to set RAPL limits, so my question is for setting some power limits, do I need to go to each core and set the limits or just set limits in core 0 in a socket. each core I meant writing all the /dev/cpu/<N>/msr nodes in that socket?

Can we set different values in each of the cores in a socket.

-Nobin

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27 Replies
Martin_D_Intel1
Employee
676 Views

ok. I updated the tool to support your cpuid. I will email to you as well. 

thanks

Martin

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Nobin_M_
Beginner
676 Views

Hi Martin,

Thanks for the power_gov.

I am using a Ivy Bridge server chip which has 10 cores ( I work for some company).

my RAPL understanding lacks some fundamental knowledge, can you answer the below question.

Lets think only about PKG domain.

We have two power limits in MSR_PKG_POWER_LIMIT register for PKG domain, say power_limit1/time_window1 and power_limit2/time_window2.

We just go ahead and set values in MSR_PKG_POWER_LIMIT register, after it is upto the system to determine how to use it(i.e. when/which limit).

How system is going to use it?

After enabling(with clamping) both, system power consumption will be limited between power_limit1 and power_limi2?

What is the importance time_window1 and time_window2? how it is used?

-Nobin

MSR_PKG_POWER_LIMIT

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Nobin_M_
Beginner
676 Views

Processor family datasheets are much more helpfull, than system programmers manuals. Processor family datasheets has much clear documentation about RAPL.

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Bernard
Valued Contributor I
676 Views

Nobin M. wrote:

Processor family datasheets are much more helpfull, than system programmers manuals. Processor family datasheets has much clear documentation about RAPL.

Can you point to some datasheets?

Thank you in advance

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Nobin_M_
Beginner
676 Views

Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families Datasheets Volume One

http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e5-1600-2600-vol-1-datasheet.pdf

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Bernard
Valued Contributor I
676 Views

Thank you Nobin:)

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Vasileios_T_
Beginner
676 Views

Hello Martin,

I am trying to use the power governor tool on an Ivy Bridge server (Intel(R) Xeon(R) CPU E5-2680 v2), but I get:

PKG_0,Core_0,Graphics_0,Uncore_0,PKG_1,Core_1,Graphics_1,Uncore_1,
*** Error in `./power_gov': free(): invalid next size (normal): 0x0000000001d25770 ***

when I try to start the power meter.

Any ideas what could it be?

Thanks,

Vasileios.

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