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I am having a hard time in understanding the ring bus system of Intel Sandy Bridge.
- How is the transmitted data in the ring bus of Intel Sandy Bridge, assign itself to a process? Specifically, is there a token assigned, to the transmitted data, which is responsible for letting the transmitted data know which process to assign itself to?
- I think that the acknowledgment ring, in the ring bus, is responsible for the flow and assignment of data to a process. Can anyone provide me with some documentation of how that works?
My reference is: http://www.hotchips.org/wp-content/uploads/hc_archives/hc23/HC23.19.9-Desktop-CPUs/HC23.19.911-Sandy-Bridge-Lempel-Intel-Rev%207.pdf
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There ain't no such thing as processes at the hardware level.
All interfaces with more than two agents need some sort of tagging of transactions. In the simplest case all that is needed is a transaction type and transaction number, but most systems also include both the source and destination identifiers in each transaction.
The on-chip ring on Intel processors is not fundamentally different than any other type of network or bus.
Every unit that is attached to the ring has a unique identifier. For a single chip, this can easily fit into a small number of bits of overhead. When a unit on the ring puts a request on the ring, the identifier of the requester is included as part of the request. When another unit responds to the request, it puts the initial requester's ID in the destination field. In Intel's case the ring is described as using shortest-path routing, so each node on the ring knows which direction to send a packet to reach its destination by the shortest path.
Some protocols allow broadcast transactions, while others make do with point-to-point transactions only. The Intel on-chip ring architecture probably supports both, but there is no need for them to describe it to us in detail because we can't interact with it anyway. We are free to measure performance using whatever methodology we want (and reach whatever conclusions we want), but there really is not any way to be certain of our understanding without working on the design team at Intel.
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