Intel PCM - Memory controller doesn't support SNB?

[GHui]

Memory controller doesn't support SNB, only support Westmere-EP, Westmere-EX, Nehalem-EP and Nehalem-EX. Am I right?
Nehalem-EP support 06_1A. What about 06_1E and 06_1F?
Westmere-EP support 06_2C. What about 06_2F?

[Patrick_F_Intel1]

Hello GHui,
In general, the way I'd have to answer these questions is to look upeach of these chips on ark.intel.com, click on the chip, download the datasheet for that chip and search for 'memory controller' in each PDF.
This is the only way to know for sure whether a particular chip has an integrated memory controller (IMC).
I don't have time to do this for each chip.
But, in general, since nehalem, systems with more than 1 processor (that is, multi-socket systems)definitely have integrated memory controllers.
For nehalem/westmere processorsfor mobile, the 1 datasheet I checked shows an IMC.
I hope this helps,
Pat

[GHui]

Thank you for your patience.

In order to understand the metrics in pcm.x, I checked the PCM source code. And ask these, make sure I am not misunderstand the code.

[Patrick_F_Intel1]

Sorry, I thought you were just asking whether these chips have a memory controller.
On the current sandybridge-based 1-socket processors, the method to monitor the memory controller was changed.
At this point in time we don't have public counters available to monitor the Sandybridge-based memory controller.
You can monitor the memory traffic due to the cpus with the events I've listed before (see posting http://software.intel.com/en-us/forums/showpost.php?p=169704 )

Pat