Load Hit LFB on SW/HW Pref - what does it count

[perfwise]

Hi,

I'm looking at PMC 0x4C here:

http://software.intel.com/sites/products/documentation/hpc/amplifierxe/en-us/lin/ug_docs/reference/index.htm#snb/events/about_front_end_performance_tuning_events.html

The documentation implies this counter allows one to measure the effectiveness of HW and SW prefetching by counting the number of "loads dispatched" (through ports 2 and 3?) which hit upon a previously requested line which was requested by either SW_PF or HW_PF (selectable via umask 0x01 or 0x02).

Question, the documentation says it does not include sw pref requests, does it increment on hw prefetch requests?

Question, if it only increments on uops dispatched does it increment only on LOADS or does it also increment on STORES? You could have a LFB allocated for SW_PF and then a store is attempted to that line?

Thanks

very useful counter btw..

perfwise

[Patrick_F_Intel1]

LOAD_HIT_PRE.SW_PF (event 0x3C, umask 0x1) counts loads (not sw prefetch generated loads) which hit the fill buffers for the lines fetched by the software prefetcher.
So the counter lets you see how frequently your loads hit buffers fetched by software prefetch instructions.

Similarly,LOAD_HIT_PRE.HW_PF (event 0x3C, umask 0x2) counts loads (not sw prefetch generated loads) which hit the fill buffers for the lines fetched by the hardwareprefetchers.
So the counter lets you see how frequently your loads hit buffers fetched by hw prefetchers.

And yes, it just counts loads.
Pat