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Hi dd,
Please look at this manual for Intel Xeon E7 processors. FVC events can be configured to count memory ECC errors (see page 2-126 for example). They can also count corrected/uncorrected memory request responses.
Best regards,
Roman
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Low level details of hardware and/or its programming interface are not an easy thing to grasp very quickly:)
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Thanks guys. I see your point, Ilya... There's an anecdote about senior and junior toilet cleaners... ;)
My goal is to measure how often RAM errors occur on my machines and whether I want ECC.
But the DRAM controller of Xeons (and the ECC RAM itself of course) looks much more complex than on "normal" non-ECC mobos, there are more parts that may fail. Do you think that measurement of RAM errors rate on ECC enabled machine can be extrapolated to a simpler non-ECC sandy/ivy bridge system?
Building the PCM to get the counters is not a problem.
Regards,
-- dd
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Does PCM measure ECC errors?
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Hello ddbug,
So... is ECC worth the extra money... that is a good question.
My first response is, how much does it matter whether you can catch memory errors?
If you are doing something where you don't mind rebooting then you probably don't need ECC memory.
For mission critical applications where you absolutely need to know whether there are memory issues (yes, DIMMs do go bad) then ECC is a requirement. This is why servers always have ECC support.
I think you can monitor ECC errors on windows in the system event log in the event viewer (eventvwr.msc).
Pat
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>>>I think you can monitor ECC errors on windows in the system event log in the event viewer (eventvwr.msc).>>>
This is implemented by WHEA architecture.
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