RAPL for energy measurement

[Yunqi_Z_]

Hi guys,

To my understanding, there are 4 interfaces defined by MSR to measure the energy consumption: PKG (package power), PP0 (core), PP1 (uncore) and DRAM. To my understanding, PKG = PP0 + PP1, and PP1 includes the power consumption of the LLC, intergrated graphic card and many other uncore stuff. And the DRAM is basically the power consumption of the main memory. Is that right?

Many thanks!

Yunqi

[Bernard]

Hi Yunqi,

can you post your source?Is this ISDM?

[Yunqi_Z_]

Hi iliyapolak,

Partly the SDM Volume 3: 14.7 Platform specific power management support, and from this paper 2.1 Overview.

Thank you!

[Bernard]

Hi Yunqi,

There is the difference between the exact meaning of PP1 power plane when you take into account client and server system.DRAM power plane is only supported on server chips.Server RAPL do not support PP0 power plane.

[Bernard]

@Yunqi,

Have you ever considered writing a driver to access various MSR register addressing space?

[Yunqi_Z_]

What do you mean exactly by a driver? I believe that's gonna be a cool idea but I don't quite get it. Could you explain some more details? Thanks!

iliyapolak wrote:

@Yunqi,

Have you ever considered writing a driver to access various MSR register addressing space?

[Bernard]

>>>Could you explain some more details? Thanks!>>>

I'm working on project where I want to develop a simple driver for Windows platform.Such a driver will be used to access MSR addressing space by using inline assembly code mainly wrmsr and rdmsr instruction in order to read/write those registers.I suppose that you are mainly developing code for Linux platform(few weeks ago I saw your code at git repository)

[Yunqi_Z_]

iliyapolak wrote:

>>>Could you explain some more details? Thanks!>>>

I'm working on project where I want to develop a simple driver for Windows platform.Such a driver will be used to access MSR addressing space by using inline assembly code mainly wrmsr and rdmsr instruction in order to read/write those registers.I suppose that you are mainly developing code for Linux platform(few weeks ago I saw your code at git repository)

I'd love to contribute to the linux part if it is going to be an open source project and I've send you a message about some details. Thanks!

[Bernard]

The bulk of code which reads/writes to MSR address space is OS agnostic only the driver helper routines or driver implementation is different on both OS's.

[APand8]

Hi Yunki,

     I am trying to use the RAPL registers, namely MSR_PKG_POWER_LIMIT to regulate power limits on our system. As you must be aware, in order to change the power limits, the lock bit of the MSR_PKG_POWER_LIMIT register must be reset. However, despite our best efforts to RESET it, we have not been able to write to the register. We have tried to so so in three ways:
 

1. Using the wrmsr command from the terminal and programatically, with root privileges. The command does not return errors but does not reset the bit either.
 

2. Editing the constarint_uw_0_power_limit file in the /sys/calss/powercap/intel-rapl directory. The file, despite being upgraded to write privileges, does not allow changes.
 

3. We tried to reset the bit by editing the intel_rapl.c file in the intel_rapl module. We try to write to the lock bit of the register (0x610) using the rapl_write_raw_data() function. Despite writing zero to the lock bit, it remains unchanged i.e. set to 1 (Value of the register : 0x8042828a001a8208)

  We are using a Haswell Processor and Linux kernel: 4.4.0-51-generic. Your inputs will be highly appreciated. Thanks in advance.