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How are the energy measurements calculated?
For example in this case it seems to be based on VID rather than vcore.
Both instances were run with fixed vcore and same performance settings and therefore should draw the same power. One with a higher VID shows ~150W while the other with lower VID shows 125W.
150W
![150W](http://www.freeimagehosting.net/newuploads/7b890.png)
125W
![125W](http://www.freeimagehosting.net/newuploads/69c72.png)
Is there a performance register to measure current IMON?
For example in this case it seems to be based on VID rather than vcore.
Both instances were run with fixed vcore and same performance settings and therefore should draw the same power. One with a higher VID shows ~150W while the other with lower VID shows 125W.
150W
![150W](http://www.freeimagehosting.net/newuploads/7b890.png)
125W
![125W](http://www.freeimagehosting.net/newuploads/69c72.png)
Is there a performance register to measure current IMON?
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Lots of times I add references for other folks who might read the comments.
For those who are interested, table 7.1 of the SNB datasheet http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/2nd-gen-core-desktop-vol-1-datasheet.pdf has the VID to voltage values.
I'm not sure about your characterization of the relation between vcore and VID.
My understanding is that VID is just the index into the voltage coretable so if VID changes then Vcc changes.
Is your 'vcore' the same as 'Vcc' (the Voltage of the cores)?
In any case,Intel is not going to discloseadditional details (beyond what is already in the SDM) of how the power MSRs calculate the power... I've already asked.
Pat
For those who are interested, table 7.1 of the SNB datasheet http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/2nd-gen-core-desktop-vol-1-datasheet.pdf has the VID to voltage values.
I'm not sure about your characterization of the relation between vcore and VID.
My understanding is that VID is just the index into the voltage coretable so if VID changes then Vcc changes.
Is your 'vcore' the same as 'Vcc' (the Voltage of the cores)?
In any case,Intel is not going to discloseadditional details (beyond what is already in the SDM) of how the power MSRs calculate the power... I've already asked.
Pat
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Hello terabytes,
I don't know how cpu-z and realtemp calculate the values they display.
I think (but I may be wrong) that showing the Voltage (or VID) has the problem that there is no 'average voltage' counter, just an instanteous MSR.
The pstate voltage can change many times between updating the display and I doubt any program is able to capture every change.
I can point you to the SandyBridge energy/power MSRs to calculate it yourself.
Perhaps RealTemp uses these MSRs to calculate average power.
Start with"Intel 64 and IA-32 Architectures Software Developers Manual Volume 3 (3A, 3B & 3C): System Programming Guide", Oct 2011, section 14.7.
For SandyBridge the MSR MSR_RAPL_POWER_UNIT shows the units used.
MSR_PKG_ENERGY_STATUS, MSR_PP0_ENERGY_STATUS, MSR_PP1_ENERGY_STATUS MSRs contain average energy used by PKG (whole chip), PP0 (power plane 0: the IA cores) and PP1 (the graphics core).
There isn't a "current IMON" register.
Hope this helps,
Pat
I don't know how cpu-z and realtemp calculate the values they display.
I think (but I may be wrong) that showing the Voltage (or VID) has the problem that there is no 'average voltage' counter, just an instanteous MSR.
The pstate voltage can change many times between updating the display and I doubt any program is able to capture every change.
I can point you to the SandyBridge energy/power MSRs to calculate it yourself.
Perhaps RealTemp uses these MSRs to calculate average power.
Start with"Intel 64 and IA-32 Architectures Software Developers Manual Volume 3 (3A, 3B & 3C): System Programming Guide", Oct 2011, section 14.7.
For SandyBridge the MSR MSR_RAPL_POWER_UNIT shows the units used.
MSR_PKG_ENERGY_STATUS, MSR_PP0_ENERGY_STATUS, MSR_PP1_ENERGY_STATUS MSRs contain average energy used by PKG (whole chip), PP0 (power plane 0: the IA cores) and PP1 (the graphics core).
There isn't a "current IMON" register.
Hope this helps,
Pat
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Hi Pat,
Thanks for the reference but I am already familiar with those MSRs and use them myself. The measuring of VID and Vcore are independent of the energy readings i.e. the power readings are based soley on the energy MSR's.
In the above example the Linpack benchmark is being run which means the p-state is going to be steady and not fluctuating barring any throttling. VID will remain fairly constant while vcore may vary a small amount due to load line. Also in the above example the BIOS is set to use a fixed voltage so VID is irrelevant as the voltage that is supplied to the CPU is fixed.
It would seem the MSR reporting for energy use is incorrect as it seems to be based VID. The power should be the same for the above 2 examples but it is not. Incidently the difference in reported power is proportionally equivalent to the square of the difference in VID which might suggest the CPU uses VID to make the energy reports to the MSR. If an algorithm can be supplied as to how the processor calculates this internally then it may be possible to add a correction in software to compensate for the incorrect value supplied by the MSR.
The CPU measures IMON, it is a shame it is not made readable by software as this is quite an important measurement IMHO.
Thanks for the reference but I am already familiar with those MSRs and use them myself. The measuring of VID and Vcore are independent of the energy readings i.e. the power readings are based soley on the energy MSR's.
In the above example the Linpack benchmark is being run which means the p-state is going to be steady and not fluctuating barring any throttling. VID will remain fairly constant while vcore may vary a small amount due to load line. Also in the above example the BIOS is set to use a fixed voltage so VID is irrelevant as the voltage that is supplied to the CPU is fixed.
It would seem the MSR reporting for energy use is incorrect as it seems to be based VID. The power should be the same for the above 2 examples but it is not. Incidently the difference in reported power is proportionally equivalent to the square of the difference in VID which might suggest the CPU uses VID to make the energy reports to the MSR. If an algorithm can be supplied as to how the processor calculates this internally then it may be possible to add a correction in software to compensate for the incorrect value supplied by the MSR.
The CPU measures IMON, it is a shame it is not made readable by software as this is quite an important measurement IMHO.
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Lots of times I add references for other folks who might read the comments.
For those who are interested, table 7.1 of the SNB datasheet http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/2nd-gen-core-desktop-vol-1-datasheet.pdf has the VID to voltage values.
I'm not sure about your characterization of the relation between vcore and VID.
My understanding is that VID is just the index into the voltage coretable so if VID changes then Vcc changes.
Is your 'vcore' the same as 'Vcc' (the Voltage of the cores)?
In any case,Intel is not going to discloseadditional details (beyond what is already in the SDM) of how the power MSRs calculate the power... I've already asked.
Pat
For those who are interested, table 7.1 of the SNB datasheet http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/2nd-gen-core-desktop-vol-1-datasheet.pdf has the VID to voltage values.
I'm not sure about your characterization of the relation between vcore and VID.
My understanding is that VID is just the index into the voltage coretable so if VID changes then Vcc changes.
Is your 'vcore' the same as 'Vcc' (the Voltage of the cores)?
In any case,Intel is not going to discloseadditional details (beyond what is already in the SDM) of how the power MSRs calculate the power... I've already asked.
Pat
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Yes, Vcore is Vcc. With a standard configuration VID would be a voltage request to the VRM. The actual voltage supplied to the CPU will depend on the load line charateristics and band tolerence.
In the example in post 1 the BIOS was set to use a fixed Vcc and therefore VID is ignored. As you can see Vcc in both cases is 1.36V. To explain a little further, in the 125W example VID without additional turbo voltage (MSR 0x194 IIRC)* will stop increasing at the HFM except for a small amount of load variation. In the 150W example using additional turbo voltage the VID can reach it's maximum of ~1.5V. Remember although VID is different in both examples we are using a fixed voltage so it does not affect the Vcc voltage in the traditional way. Both examples are run at the same Vcc and load but provide contrasting results of power measurement. This seems due to VID being used by the CPU as part of the calculation for the energy registers. Hope that makes sense.
Thanks for asking Pat, much appreciated. I'm not sure why Intel would want to keep such information confidential but that's their decision after all. My guess is that there is no CPU on chip ADC for measuring Vsense so the CPU only has VID to rely on and works something along the lines of the old formula P=CV2F with a combination of current/load. Maybe when Haswell is released there will be better integration with the VRM and power measurents will not be flawed as is with SNB.
*empirically derived.
In the example in post 1 the BIOS was set to use a fixed Vcc and therefore VID is ignored. As you can see Vcc in both cases is 1.36V. To explain a little further, in the 125W example VID without additional turbo voltage (MSR 0x194 IIRC)* will stop increasing at the HFM except for a small amount of load variation. In the 150W example using additional turbo voltage the VID can reach it's maximum of ~1.5V. Remember although VID is different in both examples we are using a fixed voltage so it does not affect the Vcc voltage in the traditional way. Both examples are run at the same Vcc and load but provide contrasting results of power measurement. This seems due to VID being used by the CPU as part of the calculation for the energy registers. Hope that makes sense.
Thanks for asking Pat, much appreciated. I'm not sure why Intel would want to keep such information confidential but that's their decision after all. My guess is that there is no CPU on chip ADC for measuring Vsense so the CPU only has VID to rely on and works something along the lines of the old formula P=CV2F with a combination of current/load. Maybe when Haswell is released there will be better integration with the VRM and power measurents will not be flawed as is with SNB.
*empirically derived.
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Hello Terabytes,
I wonder whether, when you specifya voltage in the bios, if this is treated as a 'hint' or if the processor actually sticks to the voltage. Like maybe if you request something else that would require it to increase the voltage then the voltage changes... but I'm out of my depth here.
Pat
I wonder whether, when you specifya voltage in the bios, if this is treated as a 'hint' or if the processor actually sticks to the voltage. Like maybe if you request something else that would require it to increase the voltage then the voltage changes... but I'm out of my depth here.
Pat
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