"gpio" Posts in "FPGA, SoC, And CPLD Boards And Kits"

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Changing VCCIO voltages in DE0-Nano board by AmirKhan Novice in FPGA, SoC, And CPLD Boards And Kits 08-20-2024 0 4	0	4
Inquiries regarding 10M08 Evaluation Kit FPGA by CircuitMaster Novice in FPGA, SoC, And CPLD Boards And Kits 11-21-2023 0 1	0	1
Regarding the Intel Agilex series GPIO Banks IO standards by Maitry Novice in FPGA, SoC, And CPLD Boards And Kits 07-17-2023 0 4	0	4
Using external clock to drive FPGA DE10-Nano by Syouf Novice in FPGA, SoC, And CPLD Boards And Kits 01-26-2021 0 17	0	17
How to add pull-ups on DE10-nano GPIO by jackhab New Contributor I in FPGA, SoC, And CPLD Boards And Kits 12-25-2019 1 25	1	25
Data transfer using buffer with (HPS--bridge--FPGA) by Altera_Forum Honored Contributor II in FPGA, SoC, And CPLD Boards And Kits 03-13-2018 0 2	0	2
Arria 10 SoC GPIO's by Altera_Forum Honored Contributor II in FPGA, SoC, And CPLD Boards And Kits 01-11-2018 0 0	0	0
De0-nano trace length matched by Altera_Forum Honored Contributor II in FPGA, SoC, And CPLD Boards And Kits 07-04-2017 0 1	0	1
ltspice for gpio pin by Altera_Forum Honored Contributor II in FPGA, SoC, And CPLD Boards And Kits 05-27-2017 0 2	0	2
Altera Cyclone V SoC dev kit-- LED not working by Altera_Forum Honored Contributor II in FPGA, SoC, And CPLD Boards And Kits 03-11-2015 0 0	0	0
Cyclone V DevKit with HPS disabled, GPIO does not work by Altera_Forum Honored Contributor II in FPGA, SoC, And CPLD Boards And Kits 10-28-2014 0 0	0	0
General Purpose I/O in Cyclone 5 SoC by Altera_Forum Honored Contributor II in FPGA, SoC, And CPLD Boards And Kits 03-18-2014 0 2	0	2
DE1 GPIO 5V tolerance by Altera_Forum Honored Contributor II in FPGA, SoC, And CPLD Boards And Kits 08-20-2013 0 0	0	0