"hps" Posts in "FPGA, SoC, And CPLD Boards And Kits"

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How to use DE10-nano HPS SPI on LTC connector by jackhab New Contributor I in FPGA, SoC, And CPLD Boards And Kits 06-05-2024 0 0	0	0
Assistance Needed: Trouble Running Bare-Metal Code on second core Cyclone 5 HPS by ALTERA-INSUPPORT22 New Contributor I in FPGA, SoC, And CPLD Boards And Kits 02-08-2024 0 3	0	3
How to improve Ethernet transmission speed？ by 2258432 New Contributor I in FPGA, SoC, And CPLD Boards And Kits 12-18-2023 0 11	0	11
Agilex 7: Not able to access the FPGA fabric from HPS through light weight AXI bus by spectralsensors Novice in FPGA, SoC, And CPLD Boards And Kits 12-07-2023 0 8	0	8
DE10 Standard FPGA and HPS by GreenLantern Novice in FPGA, SoC, And CPLD Boards And Kits 10-18-2023 0 3	0	3
CYCLONE V - HPS and I2C Pins on DE1-SoC Board by StefanoMarsi New Contributor I in FPGA, SoC, And CPLD Boards And Kits 10-18-2023 0 6	0	6
How to use AvalonMM-AvalonMM mode of mSGDMA by 2258432 New Contributor I in FPGA, SoC, And CPLD Boards And Kits 09-25-2023 0 6	0	6
How to use mSGDMA to continuously read data by 2258432 New Contributor I in FPGA, SoC, And CPLD Boards And Kits 08-25-2023 0 3	0	3
How to transfer data from FPGA to HPS DDR by 2258432 New Contributor I in FPGA, SoC, And CPLD Boards And Kits 08-02-2023 0 6	0	6
How to correctly read data from FIFO on HPS and send it out through HPS Ethernet by 2258432 New Contributor I in FPGA, SoC, And CPLD Boards And Kits 07-27-2023 0 12	0	12
Can the HPS EMAC RGMII on the cyclone V be connected to an external MAC interface? by ophied Novice in FPGA, SoC, And CPLD Boards And Kits 01-18-2023 0 6	0	6
Use Mictor-38 HPS JTAG on HPS IO-48 OOBE Daughter Card Stratix 10 SX Development Kit. by SSB Novice in FPGA, SoC, And CPLD Boards And Kits 01-08-2023 0 6	0	6
DE10-nano HPS boot from flash by jackhab New Contributor I in FPGA, SoC, And CPLD Boards And Kits 08-31-2022 0 6	0	6
Can't get rid of "ID:169085 No exact pin location assignment(s) for 72 pins of 135 total pins. by Alberto_F New Contributor I in FPGA, SoC, And CPLD Boards And Kits 05-30-2022 0 4	0	4
Cyclone V I2C0 on HPS fails to start by Alberto_F New Contributor I in FPGA, SoC, And CPLD Boards And Kits 05-16-2022 0 1	0	1
Run CPU1 on Arria10 SoC FPGA by Elizar Beginner in FPGA, SoC, And CPLD Boards And Kits 08-23-2021 0 1	0	1
Not receiving interrupts from FPGA to HPS by SimoneBo Beginner in FPGA, SoC, And CPLD Boards And Kits 07-30-2021 0 1	0	1
Boot cyclone V soc from NAND-flash by Sergey81 Novice in FPGA, SoC, And CPLD Boards And Kits 04-29-2021 0 2	0	2
Unable to interface the memory of custom peripheral correctly by TKruse Novice in FPGA, SoC, And CPLD Boards And Kits 11-19-2020 0 6	0	6
SPI communication in HPS of cyclone V by PShar30 Novice in FPGA, SoC, And CPLD Boards And Kits 10-18-2020 0 2	0	2
HPS Avalon Master Addressing Issue! by AAjit2 New Contributor I in FPGA, SoC, And CPLD Boards And Kits 08-06-2020 0 7	0	7
Is resetting eMMC device required in each power-on cycle of the HPS? by Shahad Beginner in FPGA, SoC, And CPLD Boards And Kits 06-18-2020 0 1	0	1
[Cyclone V HPS] Enable Transmit/Receive Checksum offload in Ethernet MAC by RHenr Novice in FPGA, SoC, And CPLD Boards And Kits 04-12-2020 0 10	0	10
Arria 10 HPS: Platform Designer Error: Unsupported Device under Linux (Windows works) by KSchi Beginner in FPGA, SoC, And CPLD Boards And Kits 03-17-2020 0 10	0	10
How to add pull-ups on DE10-nano GPIO by jackhab New Contributor I in FPGA, SoC, And CPLD Boards And Kits 12-25-2019 1 25	1	25