Analyzers
Talk to fellow users of Intel Analyzer tools (Intel VTune™ Profiler, Intel Advisor)
4998 Discussions

A question about vturn's version

jthou
Beginner
411 Views
I'm reading a book about memery optimization.It's by Kris Kaspersky, and He used the vturn5.0 to make samples.I only have vturn7.1 and 8.0, but some functions(or characters) in the book can not find in my version. I don't know whether I have not used in the right way or the funtions quoted in the book can not use in the new versions.

for example
1)
in the book, he said:
For example, when working with VTune, if you simply click the mov ecx, DWORD PTR [ebp-28] line, the profiler will provide the following information:

Listing 1.5: Penalties for mov ecx, DWORD PTR [ebp-28], Displayed by VTune


Decoder Minimum Clocks = 1 ; Minimum time of decoding: 1 clock
Decoder Average Clocks = 8.7 ; Effective time of decoding: 8.7 clocks
Decoder Maximum Clocks = 86 ; Maximum time of decoding: 86 clocks

Retirement Minimum Clocks = 0 ; Minimum time of retirement: 0 clocks
Retirement Average Clocks = 7.3 ; Effective time of retirement: 7.3 clocks
Retirement Maximum Clocks = 80 ; Maximum time of retirement: 80 clocks

Total Cycles = 80 (00.65%) ; Total time of execution: 80 clocks

Micro-Ops for this instruction = 1 ; Number of micro-ops per instruction: 1

The instruction had to wait 0 cycles for its sources to be ready.


Dynamic Penalty: IC_miss
The instruction was not in the instruction cache, so the processor loaded
the instruction from L2 cache or the main memory.
Occurrences = 1 ; This happened once.


Dynamic Penalty: L2instr_miss
The instruction was not in L2 cache, so the processor loaded the instruc-
tion from the main memory.
Occurrences = 1 ; This occurred once.


Dynamic Penalty: Store_addr_unknown
The load instruction stalled because of the address calculation of the pre-
vious store instruction.
Occurrences = 10 ; This occurred ten times.

but when I clicked the code line, the assistanct advisor apeared, and gave me nothing about that.

2)
in the book
" Now, establish the Dynamic Analysis Entry Point by clicking the button with the right-arrow. Proceed in a similar manner to specify the Dynamic Analysis Exit Point: Scroll the screen down, find the last line of the CalculateCRC function (it contains a single command, ret), click it, then click the toolbar button with the left-arrow. Now, choose the following commands from the menu: Run/Dynamic Analysis Session. In the dialog box that appears, select the processor model to be emulated (PIII, in this example) and click Start. The profiler will restart the program. After running it for a couple of minutes, the profiler will display a screen similar to the one in Fig. 1.9(in the attachment). "

thanks for answer
0 Kudos
1 Reply
David_A_Intel1
Employee
411 Views

Hi!

Regarding #1, some of this is still available in 7.2, the latest release, and should be in 7.1 that you are using. When viewing the disassembly in the source view, double-clicking on the instruction will bring up an instruction reference help page. Double-clicking on the penalty and warnings flag or penalty and warnings message, will bring up a window with the Intel Tuning Assistant that shows "tuning advice" for the selected code. Expanding this line (press the '+') will explain the penalty or warning and is a link to further information (i.e., click on it to open a help page).

Regarding #2, Dynamic Analysis was removed back in version 6.0. Prior to the Pentium 4 and Itanium processors, the Intel VTune analyzer used versions of the original processor design simulators to implement Dynamic Analysis. These simulators were structured in a way that enabled them to be integrated into the VTune analyzer. The simulator technologies that were used in the development of the Pentium 4 and Itanium processors were different and not able to be integrated into the VTune analyzer.

Hope that helps.
0 Kudos
Reply