- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi, everyone. I'm new to intel vtune. Now, I'm using Intel Vtune Amplifier XE 2011 for experiments. I want to get the L1I/D miss rate, L2 miss rate or LLC miss rate, branch misprediciton etc.I'm confused about so many hardware events. Which hardware events shoud I measure, and how to calculate them(the frmula). Can you recommend me some reference articles.
Thanks very much
Best regards
Thanks very much
Best regards
Link Copied
3 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Start with some of the preset collection/analysis groups for your CPU architecture, such as the General and memory events categories. You'll need some practice at that level.
For references, I hope the hints posted at the top of the forum will give you a start.
For references, I hope the hints posted at the top of the forum will give you a start.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Start with some of the preset collection/analysis groups for your CPU architecture, such as the General and memory events categories. You'll need some practice at that level.
For references, I hope the hints posted at the top of the forum will give you a start.
For references, I hope the hints posted at the top of the forum will give you a start.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thank you, TimP.
In fact, I don't know the differences among some events; there are so similiar. But if I collect some of them, most of them vary a lot. So, the problem is I'm confused about some of the similiar events.
For example, the L1 cache miss rate, difference between L1D.REPL and L1D_CACHE_LD.I_STATE. There are many such examples. Maybe I do not understand the materials well. Is there something else can explain these?
a lot of thanks........
In fact, I don't know the differences among some events; there are so similiar. But if I collect some of them, most of them vary a lot. So, the problem is I'm confused about some of the similiar events.
For example, the L1 cache miss rate, difference between L1D.REPL and L1D_CACHE_LD.I_STATE. There are many such examples. Maybe I do not understand the materials well. Is there something else can explain these?
a lot of thanks........
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page