Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
504 討論

Do you have any stopwatch program in VHDL available for DE10 LITE ?

xMarc3
初學者
3,584 檢視

looking for a personnal project

0 積分
5 回應
KhaiChein_Y_Intel
3,440 檢視

Hi,

 

All the design available is in our design store: https://fpgacloud.intel.com/devstore/.

 

Thanks.

KhaiChein_Y_Intel
3,440 檢視

Hi,

 

After designing the stopwatch using HDL, you may simulate the design to check the functionality and assign pin to the input/output port. Here is the user guide for DE-10 Lite

 

https://www.terasic.com.tw/cgi-bin/page/archive_download.pl?Language=English&No=1021&FID=a13a2782811152b477e60203d34b1baa

 

Thanks.

xMarc3
初學者
3,440 檢視

Hi

will looking this

thx Khai :)

KhaiChein_Y_Intel
3,440 檢視

Hi,

 

Sure. Please let me know if you have any questions.

 

Thanks.

回覆