Error in AOC compilation

[anaza3]

I am trying to compile vector_add example on DE5Net. I get this error. I am not sure what I am missing.

/tools/argus/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add$ aoc device/vector_add.cl -o bin/vector_add.aocx -report aoc: Selected default target board de5net_a7 aoc: Running OpenCL parser.... /tools/argus/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add/device/vector_add.cl:23:48: warning: declaring kernel argument with no 'restrict' may lead to low kernel performance __kernel void vector_add(__global const float *x, ^ /tools/argus/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add/device/vector_add.cl:24:48: warning: declaring kernel argument with no 'restrict' may lead to low kernel performance __global const float *y, ^ 2 warnings generated. aoc: Optimizing and doing static analysis of code...   !=========================================================================== ! The report below may be inaccurate. A more comprehensive ! resource usage report can be found at vector_add/reports/report.html !===========================================================================   +--------------------------------------------------------------------+ ; Estimated Resource Usage Summary ; +----------------------------------------+---------------------------+ ; Resource + Usage ; +----------------------------------------+---------------------------+ ; Logic utilization ; 17% ; ; ALUTs ; 11% ; ; Dedicated logic registers ; 7% ; ; Memory blocks ; 16% ; ; DSP blocks ; 0% ; +----------------------------------------+---------------------------; Compiling for FPGA. This process may take a long time, please be patient. 2020.05.14.11:52:32 Error: onchip_ram: Failed to find module system_board_onchip_ram 2020.05.14.11:52:32 Error: Generation stopped, 101 or more modules remaining 2020.05.14.11:52:36 Error: qsys-generate failed with exit code 1: 2 Errors, 40 Warnings Error: ip-generate FAILED. Refer to vector_add/vector_add.log for details.  

Theses are my environment variables :

argus@argus-server:/tools/argus/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add$ echo $AOCL_BOARD_PACKAGE_ROOT /tools/argus/intelFPGA/19.1/hld/board/trasic/de5net argus@argus-server:/tools/argus/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add$ echo $PATH /tools/argus/intelFPGA/19.1/hld/bin:/home/argus/bin:/home/argus/.local/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games:/snap/bin argus@argus-server:/tools/argus/intelFPGA/19.1/hld/board/trasic/de5net/tests/vector_add$ echo $LD_LIBRARY_PATH /tools/argus/intelFPGA/19.1/hld/board/trasic/de5net/linux64/lib:/tools/argus/intelFPGA/19.1/hld/linux64/lib:/tools/argus/intelFPGA/19.1/hld/linux64/lib:

I am attaching the log file as well. Any idea what I am missing?

[sstrell]

Can you post the kernel code?

#iwork4intel

[HRZ]

Please post the "quartus_sh_compile.log" file from your compilation folder. However, seeing that you are using Quartus 19.1 and the latest OpenCL BSP for the DE5-Net board is for Quatus 18.0, the most likely source of your problem is incompatibility between the BSP and Quartus version.